Tags

ufs: add support for Qualcomm UFS Controller

This iass Add Support for the Host Controller driver for UFS HC
present on Qualcomm Snapdragon SoCs.

It adds 2 ops to allow more control on the UFS device.

It has been successfully tested on SDM845, SM8250, SM8550 ant SM8650 SoCs.

It builds-depends on the following serie:
https://lore.kernel.org/all/20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org/

And at runtime it depends on:
https://lore.kernel.org/all/20240910-topic-ufs-qcom-phy-v1-0-21ff4b87b962@linaro.org/

To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (1):
      ufs: Add Support for Qualcomm UFS HC driver

Neil Armstrong (3):
      ufs: add device_reset callback
      ufs: add get_max_pwr_mode callback
      ufs: allow UFSHCI version 4.0

 drivers/ufs/Kconfig    |   7 +
 drivers/ufs/Makefile   |   1 +
 drivers/ufs/ufs-qcom.c | 670 +++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/ufs/ufs-qcom.h | 147 +++++++++++
 drivers/ufs/ufs.c      |  13 +-
 drivers/ufs/ufs.h      |  21 ++
 drivers/ufs/unipro.h   |   6 +
 7 files changed, 863 insertions(+), 2 deletions(-)
---
base-commit: 7725e4eb07c03ca0842b0a7ed425af28e1b8ed37
change-id: 20240910-topic-ufs-qcom-controller-4b2905610963

Best regards,

ufs: enhancements to support Qualcomm UFS controllers

This serie regroups all the fixes and base enhancements required to
support the Qualcomm UFS controllers in U-Boot.

This syncs headers & defines from Linux, and includes 2 set of
fixes that were sent separately:
- ufs: core: remove link_startup_again logic
- ufs: properly fix cache operations

Without those 2 sets, UFS cannot initialize on Qualcomm controlers
since v5, and a numerous of Cache issues makes any UFS controller
fail to initialize.

Since UFS core hasn't changed for a while, and since UFS is core
technology for the Qualcomm SoCs, I volunteer maintaininig the
UFS subsystem if Bhupesh & Neha Malcom Francis are ok with that.

To: Tom Rini <trini@konsulko.com>
To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (5):
      ufs/ufs.h: Add definition of 'ufshcd_rmwl()'
      ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP
      ufs: Sync possible UFS Quirks with Linux UFS driver
      ufs: Add missing memory barriers
      ufs: Fix debug message in 'ufs_start'

Marek Vasut (2):
      ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
      ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTO

Neil Armstrong (6):
      ufs: allocate descriptors with size aligned with DMA_MINALIGN
      ufs: fix dcache flush and invalidate range calculation
      ufs: split flush and invalidate to only invalidate when required
      ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary
      ufs: core: remove link_startup_again logic
      MAINTAINERS: Add myself to the list of UFS maintainers

 MAINTAINERS       |   1 +
 drivers/ufs/ufs.c |  98 ++++++++++++++++++++--------------
 drivers/ufs/ufs.h | 157 +++++++++++++++++++++++++++++++++++++++++++++++-------
 3 files changed, 197 insertions(+), 59 deletions(-)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-ufs-enhancements-fe8ef9ce39d8

Best regards,

phy: qcom: add QMP UFS PHY support

This serie imports the QMP UFS PHY headers then adds
the QMP PHY driver in order to support enabling the UFS
PHY on the SDM845, SM8250, SM8550 and SM8650 platforms.

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (2):
      phy: qcom: Import QMP phy related header files from Linux
      phy: qcom: Add QMP UFS PHY driver

 drivers/phy/qcom/Kconfig                           |    6 +
 drivers/phy/qcom/Makefile                          |    1 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v2.h         |   25 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v3.h         |   21 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v4.h         |   31 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v5.h         |   32 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v6.h         |   38 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v2.h             |   43 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v3.h             |  145 +++
 drivers/phy/qcom/phy-qcom-qmp-pcs-v4.h             |  135 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v3.h     |  111 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v4.h     |  123 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v6.h     |   89 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com.h        |  140 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-pll.h        |   69 ++
 .../phy/qcom/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   52 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v3.h    |   68 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v4.h    |  233 ++++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx.h       |  205 ++++
 drivers/phy/qcom/phy-qcom-qmp-ufs.c                | 1116 ++++++++++++++++++++
 drivers/phy/qcom/phy-qcom-qmp.h                    |  115 ++
 21 files changed, 2798 insertions(+)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-ufs-qcom-phy-c3d5d0f4138d

Best regards,

qcom: allow msm_gpio to set special pins direction & value

After struct msm_special_pin_data was introduced in [1], use the data
to setup the pin direction and/or value if supported by the pin data.

Add the proper msm_special_pin_data for sm8250 after sm8550 and sm8650.

[1] https://lore.kernel.org/all/20240528-topic-sm8x50-pinctrl-pinconf-v1-0-54d1e9ad7dfa@linaro.org/

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      gpio: msm: add support for special pins
      pinctr: qcom: sm8250: add special pins pins configuration data

 drivers/gpio/msm_gpio.c               | 97 ++++++++++++++++++++++++++++++++---
 drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 +++++++++++++--
 2 files changed, 127 insertions(+), 11 deletions(-)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-943311b483e2

Best regards,

regulators: qcom-rpmh: support SM8550 and SM8650 platforms

Fix the RSC and add the tables for the PM8550 and related regulators.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
To: Jaehoon Chung <jh80.chung@samsung.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      soc: qcom: rpmh-rsc: add back __tcs_set_trigger() for SM8550/SM8650
      regulator: qcom-rpmh-regulator: add support for PM8550 & related regulators

 drivers/power/regulator/qcom-rpmh-regulator.c | 136 ++++++++++++++++++++++++++
 drivers/soc/qcom/rpmh-rsc.c                   |  43 ++++++++
 2 files changed, 179 insertions(+)
---
base-commit: bb403c895887eb5b29652f916646f886b34c6309
change-id: 20240903-topic-sm8x50-regulators-support-b149f2417299

Best regards,

(no cover subject)

To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      ufs: core: remove link_startup_again logic

 drivers/ufs/ufs.c | 8 --------
 1 file changed, 8 deletions(-)
---
base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf
change-id: 20240528-topic-sm8x50-ufs-core-link-startup-again-bc2cf907c164

Best regards,

(no cover subject)

To: Lukasz Majewski <lukma@denx.de>
To: Mattijs Korpershoek <mkorpershoek@baylibre.com>
To: Marek Vasut <marex@denx.de>
To: Tom Rini <trini@konsulko.com>
To: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      usb: dwc3: gadget: fix crash in dwc3_gadget_giveback()

 drivers/usb/dwc3/gadget.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
---
base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf
change-id: 20240528-topic-sm8x50-dwc3-gadget-crash-fix-fa0404ffce33

Best regards,

pinctrl: qcom: allow setting pins configuration for sepcial pins

Add the msm_special_pin_data and implement special pins pinconf_set
for the SM8550 and Sm8650 SoCs.

SDCard support requires this in order to detect and use the card.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (5):
      pinctrl: qcom: add support for bias-pull-down
      arm: mach-snapdragon: gpio: introduce msm_special_pin_data
      pinctrl: qcom: add support setting pin configuration for special pins
      pinctrl: qcom: sm8550: add special pins pins configuration data
      pinctrl: qcom: sm8650: add special pins pins configuration data

 arch/arm/mach-snapdragon/include/mach/gpio.h | 16 ++++++++++-
 drivers/pinctrl/qcom/pinctrl-qcom.c          | 38 +++++++++++++++++++++++--
 drivers/pinctrl/qcom/pinctrl-sm8550.c        | 42 ++++++++++++++++++++++------
 drivers/pinctrl/qcom/pinctrl-sm8650.c        | 42 ++++++++++++++++++++++------
 4 files changed, 119 insertions(+), 19 deletions(-)
---
base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf
change-id: 20240528-topic-sm8x50-pinctrl-pinconf-7853bea938df

Best regards,

i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller

Add Support for the Qualcomm Generic Interface (GENI) I2C interface
found on newer Qualcomm SoCs.

The Generic Interface (GENI) is a firmware based Qualcomm Universal
Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
bus protocols depending on the firmware type loaded at early boot time
based on system configuration.

It also supports the "I2C Master Hub" which is a single function Wrapper
that only FIFO mode I2C.

It replaces the fixed-function QUP Wrapper found on older SoCs.

The geni-se.h containing the generic GENI Serial Engine registers defines
is imported from Linux.

Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented.

Finally enable the driver in the default Qualcomm defconfig.

To: Tom Rini <trini@konsulko.com>
To: Heiko Schocher <hs@denx.de>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v2:
- Fixed commit msg, removed useless debug, switched to dev_err() in probe
- Fixed some possible issues & typos and W=1 build warning
- Link to v1: https://lore.kernel.org/r/20240419-topic-sm8x50-i2c-v1-0-67651e27f23a@linaro.org

---
Neil Armstrong (2):
      i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller
      configs: qcom_defconfig: enable GENI I2C Driver

 configs/qcom_defconfig     |   1 +
 drivers/i2c/Kconfig        |  10 +
 drivers/i2c/Makefile       |   1 +
 drivers/i2c/geni_i2c.c     | 575 +++++++++++++++++++++++++++++++++++++++++++++
 include/soc/qcom/geni-se.h | 265 +++++++++++++++++++++
 5 files changed, 852 insertions(+)
---
base-commit: b2511143fba4c0631446c968fb4c0d962b01d850
change-id: 20240419-topic-sm8x50-i2c-b51e576d5f57

Best regards,

i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller

Add Support for the Qualcomm Generic Interface (GENI) I2C interface
found on newer Qualcomm SoCs.

The Generic Interface (GENI) is a firmware based Qualcomm Universal
Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
bus protocols depending on the firmware type loaded at early boot time
based on system configuration.

It also supports the "I2C Master Hub" which is a single function Wrapper
that only FIFO mode I2C.

It replaces the fixed-function QUP Wrapper found on older SoCs.

The geni-se.h containing the generic GENI Serial Engine registers defines
is imported from Linux.

Only FIFO mode is implemented, nor SE DMA nor GPI DMA is implemented.

Finally enable the driver in the default Qualcomm defconfig.

To: Tom Rini <trini@konsulko.com>
To: Heiko Schocher <hs@denx.de>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller
      configs: qcom_defconfig: enable GENI I2C Driver

 configs/qcom_defconfig     |   1 +
 drivers/i2c/Kconfig        |  10 +
 drivers/i2c/Makefile       |   1 +
 drivers/i2c/geni_i2c.c     | 576 +++++++++++++++++++++++++++++++++++++++++++++
 include/soc/qcom/geni-se.h | 265 +++++++++++++++++++++
 5 files changed, 853 insertions(+)
---
base-commit: b2511143fba4c0631446c968fb4c0d962b01d850
change-id: 20240419-topic-sm8x50-i2c-b51e576d5f57

Best regards,

phy: qcom: add support for the Qualcomm Synopsys eUSB2 PHY

Add support for the new Qualcomm Synopsys eUSB2 PHY found in the
SM8550 and SM8650 SoCs.

Finally enable the driver in the Qualcomm defconfig.

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Cc:  <u-boot-qcom@groups.io>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v2:
- fixed driver build failure due to missin }
- Link to v1: https://lore.kernel.org/r/20240405-topic-sm8x50-usb-phy-v1-0-8a8604bf818f@linaro.org

---
Neil Armstrong (2):
      phy: qcom: add Synopsys eUSB2 PHY driver
      qcom_defconfig: enable the Qualcomm Synopsys eUSB2 PHY driver

 configs/qcom_defconfig                 |   1 +
 drivers/phy/qcom/Kconfig               |   8 +
 drivers/phy/qcom/Makefile              |   1 +
 drivers/phy/qcom/phy-qcom-snps-eusb2.c | 366 +++++++++++++++++++++++++++++++++
 4 files changed, 376 insertions(+)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-usb-phy-d09a98f72d1b

Best regards,

qcom: support SPMI buttons on SM8550 and SM8650

First add PMIC gpio variant on pm8550-gpio, then rework the
qcom-pmic button driver to support data structs for each PMIC
variant and finally add the data for the pmk8350 button configs.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc:  <u-boot@lists.denx.de>
Cc:  <u-boot-qcom@groups.io>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v2:
- added missing qcom,pmk8350-pon compatible
- Link to v1: https://lore.kernel.org/r/20240405-topic-sm8x50-spmi-clients-v1-0-c28603ebcf18@linaro.org

---
Neil Armstrong (3):
      gpio: qcom_pmic_gpio: add support for pm8550-gpio
      button: qcom-pmic: move node name checks to btn_data struct
      button: qcom-pmic: add support for pmk8350 button configs

 drivers/button/button-qcom-pmic.c | 99 ++++++++++++++++++++++++++++-----------
 drivers/gpio/qcom_pmic_gpio.c     | 18 ++++++-
 2 files changed, 87 insertions(+), 30 deletions(-)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-spmi-clients-d9a085aae979

Best regards,

phy: qcom: add support for the Qualcomm Synopsys eUSB2 PHY

Add support for the new Qualcomm Synopsys eUSB2 PHY found in the
SM8550 and SM8650 SoCs.

Finally enable the driver in the Qualcomm defconfig.

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      phy: qcom: add Synopsys eUSB2 PHY driver
      qcom_defconfig: enable the Qualcomm Synopsys eUSB2 PHY driver

 configs/qcom_defconfig                 |   1 +
 drivers/phy/qcom/Kconfig               |   8 +
 drivers/phy/qcom/Makefile              |   1 +
 drivers/phy/qcom/phy-qcom-snps-eusb2.c | 365 +++++++++++++++++++++++++++++++++
 4 files changed, 375 insertions(+)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-usb-phy-d09a98f72d1b

Best regards,

qcom: support SPMI buttons on SM8550 and SM8650

First add PMIC gpio variant on pm8550-gpio, then rework the
qcom-pmic button driver to support data structs for each PMIC
variant and finally add the data for the pmk8350 button configs.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (3):
      gpio: qcom_pmic_gpio: add support for pm8550-gpio
      button: qcom-pmic: move node name checks to btn_data struct
      button: qcom-pmic: add support for pmk8350 button configs

 drivers/button/button-qcom-pmic.c | 98 ++++++++++++++++++++++++++++-----------
 drivers/gpio/qcom_pmic_gpio.c     | 18 ++++++-
 2 files changed, 86 insertions(+), 30 deletions(-)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-spmi-clients-d9a085aae979

Best regards,

smpi: msm: fix version 5 and add version 7 support

First, fix version 5 support by using the right ch_offset in
then msm_spmi_write() reg accesses.

Then:
- properly format command by importing helpers from Linux driver and
  use a switch/case to handle all versions in msm_spmi_write/read() command.
- handle peripheral ownership by poking into the cnfg registers and
  mark periperal as read-only when the owner id doesn't match
- finally add version 7 defines

SPMI Arbiter Version 7 is present on SM8450, SM8550 and SM8650 SoC.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
To: Tom Rini <trini@konsulko.com>
To: Dzmitry Sankouski <dsankouski@gmail.com>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (4):
      spmi: msm: fix version 5 support
      spmi: msm: properly format command
      spmi: msm: handle peripheral ownership
      spmi: msm: support controller version 7

 drivers/spmi/spmi-msm.c | 148 +++++++++++++++++++++++++++++++++++++-----------
 1 file changed, 116 insertions(+), 32 deletions(-)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-spmi-fixes-aec9b392813b

Best regards,

qcom: add pinctrl driver for SM8550 and SM8650

Add pinctrl driver for the TLMM block found in the SM8550 & SM8650 SoCs.

This driver only handles the gpio and qup debug uart pinmux, and makes sure
the pinconf applies on SDC2 pins.

Finally enable both drivers in the Qualcomm defconfig

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (3):
      pinctrl: qcom: Add SM8550 pinctrl driver
      pinctrl: qcom: Add SM8650 pinctrl driver
      qcom_defconfig: enable SM8550 & SM8650 pinctrl driver

 configs/qcom_defconfig                |  2 +
 drivers/pinctrl/qcom/Kconfig          | 14 +++++++
 drivers/pinctrl/qcom/Makefile         |  2 +
 drivers/pinctrl/qcom/pinctrl-sm8550.c | 75 +++++++++++++++++++++++++++++++++++
 drivers/pinctrl/qcom/pinctrl-sm8650.c | 75 +++++++++++++++++++++++++++++++++++
 5 files changed, 168 insertions(+)
---
base-commit: cec1c47bdaf84a643f318d480b1218bfff1041ff
change-id: 20240404-topic-sm8x50-pinctrl-101fac729d23

Best regards,

qcom: add clock driver support for SM8550 and SM8650 SoCc

Add the GCC and TCSRCC clock driver for the SM8550 & SM8650 SoCs.

The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.

The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.

The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.

In addition, the drivers are enabled in the Qualcomm defconfig.

To: Tom Rini <trini@konsulko.com>
To: Lukasz Majewski <lukma@denx.de>
To: Sean Anderson <seanga2@gmail.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc:  <u-boot@lists.denx.de>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (3):
      clk: qcom: Add SM8550 clock driver
      clk: qcom: Add SM8650 clock driver
      qcom_defconfig: enable SM8550 & SM8650 clock driver

 configs/qcom_defconfig          |   2 +
 drivers/clk/qcom/Kconfig        |  16 ++
 drivers/clk/qcom/Makefile       |   2 +
 drivers/clk/qcom/clock-sm8550.c | 335 ++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/clock-sm8650.c | 332 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 687 insertions(+)
---
base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb
change-id: 20240404-topic-sm8x50-clock-a76f8359b5fb

Best regards,

v2023.04 to demonstrate RB1/RB2 single boot

Prepare v2023.04

Prepare v2023.04-rc5