Tags

rng: msm: support newer SoCs

Add support for RNG on newer SoCs which shares the
RNG hardware between different Execution Environments (EE).

Also enable it by default to fill KASL seed when running Linux.

To: Robert Marko <robert.marko@sartura.hr>
To: Luka Perkov <luka.perkov@sartura.hr>
To: Sughosh Ganu <sughosh.ganu@linaro.org>
To: Heinrich Schuchardt <xypron.glpk@gmx.de>
To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      rng: msm: add support for newer Qualcomm hwrandom IPs
      configs: qcom_defconfig: enable RNG driver and command

 configs/qcom_defconfig |  3 +++
 drivers/rng/msm_rng.c  | 13 ++++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)
---
base-commit: dc1859f8d2ac3faaa5e2e1d465ec4bd8980520a5
change-id: 20241125-topic-sm8x50-rng-714cd0012391

Best regards,

pci: Add support for Qualcomm PCIe controller

Add support for the DWC PCIe controllers found
on the Qualcomm SoCs, it requires introducing
pcie_dw_find_capability() to properly configure
the Host controller capabilities.

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      pci: pcie_dw_common: introduce pcie_dw_find_capability()
      pci: Add support for Qualcomm PCIe controller

 drivers/pci/Kconfig          |   8 +
 drivers/pci/Makefile         |   1 +
 drivers/pci/pcie_dw_common.c |  42 ++++
 drivers/pci/pcie_dw_common.h |   2 +
 drivers/pci/pcie_dw_qcom.c   | 571 +++++++++++++++++++++++++++++++++++++++++++
 include/pci.h                |   4 +
 6 files changed, 628 insertions(+)
---
base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667
change-id: 20241125-topic-pcie-controller-cf11210bf5b3

Best regards,

(no cover subject)

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      phy: qcom: add QMP PCIe PHY driver

 drivers/phy/qcom/Kconfig                           |    6 +
 drivers/phy/qcom/Makefile                          |    1 +
 drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h           |  123 +++
 drivers/phy/qcom/phy-qcom-qmp-pcie.c               | 1131 ++++++++++++++++++++
 drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h        |   72 ++
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h     |   19 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h     |   23 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h     |   25 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h             |   34 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h             |   32 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h          |   19 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h |   32 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h    |   83 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h |   51 +
 17 files changed, 1702 insertions(+)
---
base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667
change-id: 20241125-topic-pcie-phy-542f745f39b5

Best regards,

clk: qcom: add PCIe clocks

Add the PCIe clocks for the SM8550, SM8650 and X1E80100
platforms to enable support for PCIe feature.

Depends on:
- https://lore.kernel.org/all/20241118-topic-x1e80100-clk-v1-0-8841e87ad81f@linaro.org/

To: Lukasz Majewski <lukma@denx.de>
To: Sean Anderson <seanga2@gmail.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (4):
      clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock
      clk: qcom: sm8550: add support for PCIe clocks
      clk: qcom: sm8650: add support for PCIe clocks
      clk: qcom: x1e80100: add support for PCIe clocks

 drivers/clk/qcom/clock-qcom.c     | 19 ++++++++++++++
 drivers/clk/qcom/clock-qcom.h     |  2 ++
 drivers/clk/qcom/clock-sm8550.c   | 36 ++++++++++++++++++++++++++
 drivers/clk/qcom/clock-sm8650.c   | 36 ++++++++++++++++++++++++++
 drivers/clk/qcom/clock-x1e80100.c | 54 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 147 insertions(+)
---
base-commit: c7934881aa75d34aea2493322de0a417524ebf4a
change-id: 20241125-topic-pcie-clk-8e345d8ace7a

Best regards,

pinctrl: qcom: add clk_req functions

Add the missing PCIe clk_req functions for the SM8550, SM8650
and X1E80100 TLMM.

Depends on:
- https://lore.kernel.org/all/20241115-topic-x1e80100-pinctrl-v1-0-35f984226e47@linaro.org/

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (3):
      pinctrl: qcom: sm8550: add pcie1_clk_req_n function
      pinctrl: qcom: sm8650: add pcie[01]_clk_req_n function
      pinctrl: qcom: x1e80100: add pcie[3456ab]_clk functions

 drivers/pinctrl/qcom/pinctrl-sm8550.c   | 1 +
 drivers/pinctrl/qcom/pinctrl-sm8650.c   | 2 ++
 drivers/pinctrl/qcom/pinctrl-x1e80100.c | 5 +++++
 3 files changed, 8 insertions(+)
---
base-commit: 7a36c84ff57177ccd3107f62c8d14fa0093e0e76
change-id: 20241125-topic-pcie-pinctrl-77f1c184e73f

Best regards,

(no cover subject)

To: Jaehoon Chung <jh80.chung@samsung.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      regulator: qcom-rpmh-regulator: add support for pmc8380 regulators

 drivers/power/regulator/qcom-rpmh-regulator.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
---
base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667
change-id: 20241125-topic-hamoa-pmc8380-rpmh-regulators-2b9460fcd7bd

Best regards,

image: android: misc fixes when using on Qualcomm platforms

When trying to use the Android boot image with header version 2
on recent Qualcomm platforms, we get into some troubles.

First the kernel in-place address can be > 32bit, then since
we use the Android mkbootimg, it uses the default load address
which isn't big enough to uncompress the kernel.

Finally, the ramdisk also uses a default load address, and
it should be taken in account like for the kernel address.

To: Tom Rini <trini@konsulko.com>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: Guillaume La Roque <glaroque@baylibre.com>
Cc: Caleb Connolly <caleb.connolly@linaro.org>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v2:
- Fix patch 2 prefix
- Fix patch 3 commit msg
- Fix patch 3 behavior when using boot image header version > 2, use the original ramdisk_ptr
- Link to v1: https://lore.kernel.org/r/20241016-topic-fastboot-fixes-mkbootimg-v1-0-94fd9340722b@linaro.org

---
Neil Armstrong (3):
      image: android: use ulong for kernel address
      image: android: do not boot XIP when kernel is compressed
      image: android: handle ramdisk default address

 boot/image-android.c    | 62 +++++++++++++++++++++++++++++++++++++------------
 include/android_image.h |  2 +-
 2 files changed, 48 insertions(+), 16 deletions(-)
---
base-commit: d5cab0d6adc26ec1bbd45c2fed101184d04454ae
change-id: 20241016-topic-fastboot-fixes-mkbootimg-8d73ab93db3d

Best regards,

(no cover subject)

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      qcom_defconfig: enable PINCONF

 configs/qcom_defconfig | 1 +
 1 file changed, 1 insertion(+)
---
base-commit: d5cab0d6adc26ec1bbd45c2fed101184d04454ae
change-id: 20241017-topic-sm8x50-enable-pinconf-58ae8e77cd36

Best regards,

image: android: misc fixes when using on Qualcomm platforms

When trying to use the Android boot image with header version 2
on recent Qualcomm platforms, we get into some troubles.

First the kernel in-place address can be > 32bit, then since
we use the Android mkbootimg, it uses the default load address
which isn't big enough to uncompress the kernel.

Finally, the ramdisk also uses a default load address, and
it should be taken in account like for the kernel address.

To: Tom Rini <trini@konsulko.com>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: Guillaume La Roque <glaroque@baylibre.com>
Cc: Caleb Connolly <caleb.connolly@linaro.org>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (3):
      image: android: use ulong for kernel address
      boot: image-android: do not boot XIP when kernel is compressed
      image: android: handle ramdisk default address

 boot/image-android.c    | 60 +++++++++++++++++++++++++++++++++++++------------
 include/android_image.h |  2 +-
 2 files changed, 47 insertions(+), 15 deletions(-)
---
base-commit: d5cab0d6adc26ec1bbd45c2fed101184d04454ae
change-id: 20241016-topic-fastboot-fixes-mkbootimg-8d73ab93db3d

Best regards,

dwc3: gadget: properly fix cache operations

We experience huge problems with cache handling on Qualcomm
systems, and it appears the dcache handling in the DWC3 gadget
code is quite wrong and causes operational issues.

This serie fixes the dcache operations on unaligned data,
and properly invalidate buffers when reading back data from
hardware.

To: Marek Vasut <marex@denx.de>
To: Tom Rini <trini@konsulko.com>
To: Lukasz Majewski <lukma@denx.de>
To: Mattijs Korpershoek <mkorpershoek@baylibre.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Caleb Connolly <caleb.connolly@linaro.org>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v4:
- Go back to CACHELINE_SIZE, and do not use DMA_MINALIGN since it's not valid for all platforms
- Link to v3: https://lore.kernel.org/r/20241002-u-boot-dwc3-gadget-dcache-fixup-v3-0-5398088ef93c@linaro.org

Changes in v3:
- Cast addresses to (unsigned long) when calling invalidate_dcache_range()
- Drop unused CACHELINE_SIZE
- Fix warning by casting ctrl to uintptr_r when calling dwc3_invalidate_cache()
- Link to v2: https://lore.kernel.org/r/20240724-u-boot-dwc3-gadget-dcache-fixup-v2-0-65836d699a71@linaro.org

Changes in v2:
- Fix typo in drivers/usb/dwc3/core.h and rewrite patch 1 commit message
- Link to v1: https://lore.kernel.org/r/20240719-u-boot-dwc3-gadget-dcache-fixup-v1-0-58a5f026ea8e@linaro.org

---
Neil Armstrong (3):
      usb: dwc3: allocate setup_buf with dma_alloc_coherent()
      usb: dwc3: fix dcache flush range calculation
      usb: dwc3: invalidate dcache on buffer used in interrupt handling

 drivers/usb/dwc3/core.h   |  2 ++
 drivers/usb/dwc3/ep0.c    |  6 ++++--
 drivers/usb/dwc3/gadget.c | 10 ++++++----
 drivers/usb/dwc3/io.h     | 13 ++++++++++++-
 4 files changed, 24 insertions(+), 7 deletions(-)
---
base-commit: ddbcafeb53e7093c58488596bfce6d8823777c3a
change-id: 20240719-u-boot-dwc3-gadget-dcache-fixup-ea1e92758663

Best regards,

dwc3: gadget: properly fix cache operations

We experience huge problems with cache handling on Qualcomm
systems, and it appears the dcache handling in the DWC3 gadget
code is quite wrong and causes operational issues.

This serie fixes the dcache operations on unaligned data,
and properly invalidate buffers when reading back data from
hardware.

To: Marek Vasut <marex@denx.de>
To: Tom Rini <trini@konsulko.com>
To: Lukasz Majewski <lukma@denx.de>
To: Mattijs Korpershoek <mkorpershoek@baylibre.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Caleb Connolly <caleb.connolly@linaro.org>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v3:
- Cast addresses to (unsigned long) when calling invalidate_dcache_range()
- Drop unused CACHELINE_SIZE
- Fix warning by casting ctrl to uintptr_r when calling dwc3_invalidate_cache()
- Link to v2: https://lore.kernel.org/r/20240724-u-boot-dwc3-gadget-dcache-fixup-v2-0-65836d699a71@linaro.org

Changes in v2:
- Fix typo in drivers/usb/dwc3/core.h and rewrite patch 1 commit message
- Link to v1: https://lore.kernel.org/r/20240719-u-boot-dwc3-gadget-dcache-fixup-v1-0-58a5f026ea8e@linaro.org

---
Neil Armstrong (3):
      usb: dwc3: allocate setup_buf with dma_alloc_coherent()
      usb: dwc3: fix dcache flush range calculation
      usb: dwc3: invalidate dcache on buffer used in interrupt handling

 drivers/usb/dwc3/core.h   |  2 ++
 drivers/usb/dwc3/ep0.c    |  6 ++++--
 drivers/usb/dwc3/gadget.c | 10 ++++++----
 drivers/usb/dwc3/io.h     | 14 ++++++++++++--
 4 files changed, 24 insertions(+), 8 deletions(-)
---
base-commit: ddbcafeb53e7093c58488596bfce6d8823777c3a
change-id: 20240719-u-boot-dwc3-gadget-dcache-fixup-ea1e92758663

Best regards,

ufs: enhancements to support Qualcomm UFS controllers

This serie regroups all the fixes and base enhancements required to
support the Qualcomm UFS controllers in U-Boot.

This syncs headers & defines from Linux, and includes 2 set of
fixes that were sent separately:
- ufs: core: remove link_startup_again logic
- ufs: properly fix cache operations

Without those 2 sets, UFS cannot initialize on Qualcomm controlers
since v5, and a numerous of Cache issues makes any UFS controller
fail to initialize.

Since UFS core hasn't changed for a while, and since UFS is core
technology for the Qualcomm SoCs, I volunteer maintaininig the
UFS subsystem if Bhupesh & Neha Malcom Francis are ok with that.

It has been reported to show regressions on:
- TI K3 platforms (j721s2, j721e, j7200, j784s4) [1]
- AMD platform (amd_versal2_virt_defconfig) [2]

[1] https://lore.kernel.org/all/38f599a8-7094-4a04-8ff6-96fc8b9d168a@ti.com/
[2] https://lore.kernel.org/all/SA1PR12MB869713CA620F99077B75EF0E98632@SA1PR12MB8697.namprd12.prod.outlook.com/

To: Tom Rini <trini@konsulko.com>
To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: bmeng.cn@gmail.com
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v3:
- Fixup patch 9
- Link to v2: https://lore.kernel.org/r/20240920-topic-ufs-enhancements-v2-0-65ae61e73eaa@linaro.org

Changes in v2:
- Added review and tested-by tags
- Updated patch 12 message with more explanations
- Synced patch 9 again with Linux 6.11
- Updated patches 7, 8, 9 and 10 with informations about the origins of the changes
- Link to v1: https://lore.kernel.org/r/20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org

---
Bhupesh Sharma (5):
      ufs/ufs.h: Add definition of 'ufshcd_rmwl()'
      ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP
      ufs: Sync possible UFS Quirks with Linux UFS driver
      ufs: Add missing memory barriers
      ufs: Fix debug message in 'ufs_start'

Marek Vasut (2):
      ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
      ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTO

Neil Armstrong (6):
      ufs: allocate descriptors with size aligned with DMA_MINALIGN
      ufs: fix dcache flush and invalidate range calculation
      ufs: split flush and invalidate to only invalidate when required
      ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary
      ufs: core: remove link_startup_again logic
      MAINTAINERS: Add myself to the list of UFS maintainers

 MAINTAINERS       |   1 +
 drivers/ufs/ufs.c |  98 +++++++++++++++-----------
 drivers/ufs/ufs.h | 203 ++++++++++++++++++++++++++++++++++++++++++++++++------
 3 files changed, 241 insertions(+), 61 deletions(-)
---
base-commit: ddbcafeb53e7093c58488596bfce6d8823777c3a
change-id: 20240910-topic-ufs-enhancements-fe8ef9ce39d8

Best regards,

ufs: enhancements to support Qualcomm UFS controllers

This serie regroups all the fixes and base enhancements required to
support the Qualcomm UFS controllers in U-Boot.

This syncs headers & defines from Linux, and includes 2 set of
fixes that were sent separately:
- ufs: core: remove link_startup_again logic
- ufs: properly fix cache operations

Without those 2 sets, UFS cannot initialize on Qualcomm controlers
since v5, and a numerous of Cache issues makes any UFS controller
fail to initialize.

Since UFS core hasn't changed for a while, and since UFS is core
technology for the Qualcomm SoCs, I volunteer maintaininig the
UFS subsystem if Bhupesh & Neha Malcom Francis are ok with that.

It has been reported to show regressions on:
- TI K3 platforms (j721s2, j721e, j7200, j784s4) [1]
- AMD platform (amd_versal2_virt_defconfig) [2]

[1] https://lore.kernel.org/all/38f599a8-7094-4a04-8ff6-96fc8b9d168a@ti.com/
[2] https://lore.kernel.org/all/SA1PR12MB869713CA620F99077B75EF0E98632@SA1PR12MB8697.namprd12.prod.outlook.com/

To: Tom Rini <trini@konsulko.com>
To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: bmeng.cn@gmail.com
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Changes in v2:
- Added review and tested-by tags
- Updated patch 12 message with more explanations
- Synced patch 9 again with Linux 6.11
- Updated patches 7, 8, 9 and 10 with informations about the origins of the changes
- Link to v1: https://lore.kernel.org/r/20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org

---
Bhupesh Sharma (5):
      ufs/ufs.h: Add definition of 'ufshcd_rmwl()'
      ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP
      ufs: Sync possible UFS Quirks with Linux UFS driver
      ufs: Add missing memory barriers
      ufs: Fix debug message in 'ufs_start'

Marek Vasut (2):
      ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
      ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTO

Neil Armstrong (6):
      ufs: allocate descriptors with size aligned with DMA_MINALIGN
      ufs: fix dcache flush and invalidate range calculation
      ufs: split flush and invalidate to only invalidate when required
      ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary
      ufs: core: remove link_startup_again logic
      MAINTAINERS: Add myself to the list of UFS maintainers

 MAINTAINERS       |   1 +
 drivers/ufs/ufs.c |  98 ++++++++++++++++-----------
 drivers/ufs/ufs.h | 199 ++++++++++++++++++++++++++++++++++++++++++++++++------
 3 files changed, 239 insertions(+), 59 deletions(-)
---
base-commit: 24961c0e0444d3ed534ffc6a173e6ea636ca116b
change-id: 20240910-topic-ufs-enhancements-fe8ef9ce39d8

Best regards,

ufs: add support for Qualcomm UFS Controller

This iass Add Support for the Host Controller driver for UFS HC
present on Qualcomm Snapdragon SoCs.

It adds 2 ops to allow more control on the UFS device.

It has been successfully tested on SDM845, SM8250, SM8550 ant SM8650 SoCs.

It builds-depends on the following serie:
https://lore.kernel.org/all/20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org/

And at runtime it depends on:
https://lore.kernel.org/all/20240910-topic-ufs-qcom-phy-v1-0-21ff4b87b962@linaro.org/

To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (1):
      ufs: Add Support for Qualcomm UFS HC driver

Neil Armstrong (3):
      ufs: add device_reset callback
      ufs: add get_max_pwr_mode callback
      ufs: allow UFSHCI version 4.0

 drivers/ufs/Kconfig    |   7 +
 drivers/ufs/Makefile   |   1 +
 drivers/ufs/ufs-qcom.c | 670 +++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/ufs/ufs-qcom.h | 147 +++++++++++
 drivers/ufs/ufs.c      |  13 +-
 drivers/ufs/ufs.h      |  21 ++
 drivers/ufs/unipro.h   |   6 +
 7 files changed, 863 insertions(+), 2 deletions(-)
---
base-commit: 7725e4eb07c03ca0842b0a7ed425af28e1b8ed37
change-id: 20240910-topic-ufs-qcom-controller-4b2905610963

Best regards,

ufs: enhancements to support Qualcomm UFS controllers

This serie regroups all the fixes and base enhancements required to
support the Qualcomm UFS controllers in U-Boot.

This syncs headers & defines from Linux, and includes 2 set of
fixes that were sent separately:
- ufs: core: remove link_startup_again logic
- ufs: properly fix cache operations

Without those 2 sets, UFS cannot initialize on Qualcomm controlers
since v5, and a numerous of Cache issues makes any UFS controller
fail to initialize.

Since UFS core hasn't changed for a while, and since UFS is core
technology for the Qualcomm SoCs, I volunteer maintaininig the
UFS subsystem if Bhupesh & Neha Malcom Francis are ok with that.

To: Tom Rini <trini@konsulko.com>
To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (5):
      ufs/ufs.h: Add definition of 'ufshcd_rmwl()'
      ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP
      ufs: Sync possible UFS Quirks with Linux UFS driver
      ufs: Add missing memory barriers
      ufs: Fix debug message in 'ufs_start'

Marek Vasut (2):
      ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
      ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTO

Neil Armstrong (6):
      ufs: allocate descriptors with size aligned with DMA_MINALIGN
      ufs: fix dcache flush and invalidate range calculation
      ufs: split flush and invalidate to only invalidate when required
      ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary
      ufs: core: remove link_startup_again logic
      MAINTAINERS: Add myself to the list of UFS maintainers

 MAINTAINERS       |   1 +
 drivers/ufs/ufs.c |  98 ++++++++++++++++++++--------------
 drivers/ufs/ufs.h | 157 +++++++++++++++++++++++++++++++++++++++++++++++-------
 3 files changed, 197 insertions(+), 59 deletions(-)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-ufs-enhancements-fe8ef9ce39d8

Best regards,

phy: qcom: add QMP UFS PHY support

This serie imports the QMP UFS PHY headers then adds
the QMP PHY driver in order to support enabling the UFS
PHY on the SDM845, SM8250, SM8550 and SM8650 platforms.

To: Tom Rini <trini@konsulko.com>
To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: u-boot@lists.denx.de
Cc: u-boot-qcom@groups.io
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Bhupesh Sharma (2):
      phy: qcom: Import QMP phy related header files from Linux
      phy: qcom: Add QMP UFS PHY driver

 drivers/phy/qcom/Kconfig                           |    6 +
 drivers/phy/qcom/Makefile                          |    1 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v2.h         |   25 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v3.h         |   21 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v4.h         |   31 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v5.h         |   32 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v6.h         |   38 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v2.h             |   43 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v3.h             |  145 +++
 drivers/phy/qcom/phy-qcom-qmp-pcs-v4.h             |  135 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v3.h     |  111 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v4.h     |  123 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v6.h     |   89 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com.h        |  140 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-pll.h        |   69 ++
 .../phy/qcom/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   52 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v3.h    |   68 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v4.h    |  233 ++++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx.h       |  205 ++++
 drivers/phy/qcom/phy-qcom-qmp-ufs.c                | 1116 ++++++++++++++++++++
 drivers/phy/qcom/phy-qcom-qmp.h                    |  115 ++
 21 files changed, 2798 insertions(+)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-ufs-qcom-phy-c3d5d0f4138d

Best regards,

qcom: allow msm_gpio to set special pins direction & value

After struct msm_special_pin_data was introduced in [1], use the data
to setup the pin direction and/or value if supported by the pin data.

Add the proper msm_special_pin_data for sm8250 after sm8550 and sm8650.

[1] https://lore.kernel.org/all/20240528-topic-sm8x50-pinctrl-pinconf-v1-0-54d1e9ad7dfa@linaro.org/

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      gpio: msm: add support for special pins
      pinctr: qcom: sm8250: add special pins pins configuration data

 drivers/gpio/msm_gpio.c               | 97 ++++++++++++++++++++++++++++++++---
 drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 +++++++++++++--
 2 files changed, 127 insertions(+), 11 deletions(-)
---
base-commit: ca55cf8104c0dd78aae45fa66dd8400ef1b3d0ac
change-id: 20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-943311b483e2

Best regards,

regulators: qcom-rpmh: support SM8550 and SM8650 platforms

Fix the RSC and add the tables for the PM8550 and related regulators.

To: Caleb Connolly <caleb.connolly@linaro.org>
To: Sumit Garg <sumit.garg@linaro.org>
To: Tom Rini <trini@konsulko.com>
To: Jaehoon Chung <jh80.chung@samsung.com>
Cc: u-boot-qcom@groups.io
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (2):
      soc: qcom: rpmh-rsc: add back __tcs_set_trigger() for SM8550/SM8650
      regulator: qcom-rpmh-regulator: add support for PM8550 & related regulators

 drivers/power/regulator/qcom-rpmh-regulator.c | 136 ++++++++++++++++++++++++++
 drivers/soc/qcom/rpmh-rsc.c                   |  43 ++++++++
 2 files changed, 179 insertions(+)
---
base-commit: bb403c895887eb5b29652f916646f886b34c6309
change-id: 20240903-topic-sm8x50-regulators-support-b149f2417299

Best regards,

(no cover subject)

To: Bhupesh Sharma <bhupesh.linux@gmail.com>
To: Neha Malcom Francis <n-francis@ti.com>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      ufs: core: remove link_startup_again logic

 drivers/ufs/ufs.c | 8 --------
 1 file changed, 8 deletions(-)
---
base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf
change-id: 20240528-topic-sm8x50-ufs-core-link-startup-again-bc2cf907c164

Best regards,

(no cover subject)

To: Lukasz Majewski <lukma@denx.de>
To: Mattijs Korpershoek <mkorpershoek@baylibre.com>
To: Marek Vasut <marex@denx.de>
To: Tom Rini <trini@konsulko.com>
To: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

---
Neil Armstrong (1):
      usb: dwc3: gadget: fix crash in dwc3_gadget_giveback()

 drivers/usb/dwc3/gadget.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
---
base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf
change-id: 20240528-topic-sm8x50-dwc3-gadget-crash-fix-fa0404ffce33

Best regards,