- Especially BT AVRCP is failing. BT stack reports randomly Unimplemented packet types during youtube playback shifting.

Signed-off-by: Ondrej Lutera <ondrej.lutera@nxp.com>

SEAT_TEMP has off + 3 possible values. So limited it here for now to 4 values.

Signed-off-by: Ondrej Lutera <ondrej.lutera@nxp.com>

- Added to pass various CtsHardwareTestCases

Signed-off-by: Ondrej Lutera <ondrej.lutera@nxp.com>

# Conflicts:
#	drivers/mxc/hantro/hantrodec.c

AAUTO-323 Fix for VTS test case com.android.tests.sysfs.KernelApiSysfsTest#testKfenceSampleRate from module KernelApiSysfsTest. Changed KFENCE sampling interval from 100 -> 500 (recommended value, alligned with GKI image)

"this type is not" correct messages in console.

 space is sending message with string callback. Without this update is
kernel crashing.

Add imx8mp_powersave_gki.fragment for powersave image,
and add CONFIG_CLK_POWER_SAVE.

After enabling this CONFIG_CLK_POWER_SAVE, only the
clks in static char *m4_lpa_required_ccm_slices[ ]
are kept on, so that the M core can control the clks.

Change-Id: I77dd6cc06e5ac51efcf81d61b8b7ec1f1596b99d
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

In the following patch, we only open the clks that LPA can use
after enabling the M core:

MA-18346-25 0nly for M7 LPA required CCM slice, skip controlled by A53

Because we only achieved LPA on 8mm and 8mp. Therefore, it will cause
problems when M core is enabled on 8mq and 8mn. So I add a CONFIG to
distinguish.

At the same time, if the M core of the 8m* board wants to achieve not
only the function of LPA, but also the clk used to be added to
static char *m4_lpa_required_ccm_slices[ ].

Change-Id: Iaab3b5f39949ba82bf5f7457c8981b865a7c4cd4
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

To align the Kfence sample interval value to the GKI one.

TEST: run vts -m KernelApiSysfsTest -t
com.android.tests.sysfs.KernelApiSysfsTest#testKfenceSampleRate

Change-Id: Id6809a1ff215fc8f9ccaa00f83dc0c3443cc3b6d
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>

Because the argument type is volatile, but the parameter is
not, you need both to be volatile.

test:

when build nxp kernel in aosp kernel repo, we will meet the build error.
/opt/android/kernel_symbols_build/gki-imx/common/drivers/mxc/hantro/hantrodec.c:402:48:
error: passing 'volatile u8 *' (aka 'volatile unsigned ch
ar *') to parameter of type 'u8 *' (aka 'unsigned char *') discards qualifiers
[-Werror,-Wincompatible-pointer-types-discards-qualifiers]
trusty_ctrlblk_write(&hantrodec_data, 0, 0x3, iobase);  //VPUMIX G1/G2 block soft reset  control

BUILD_CONFIG=common/build.config.imx build/build_abi.sh

Change-Id: I055e65c65927fb3171aa4b8fd536106aaf252913
Signed-off-by: zhai.he <zhai.he@nxp.com>

In order to distinguish the compilation of 8q and 8m boards in domain.c
and domain.h.

Change-Id: I0c2b4232f51f12cb7353740c17a9ba950769decf
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

This patch is from：
PM/Domains: Support enter deepest state for multiple states domains

Because this patch changes struct generic_pm_domain breaks gki, and
without this patch causes the power consumption of VCC_MAIN to
increase during 8q* suspend. So I increased CONFIG_MX8QDX_PM_DOMAINS
to distinguish.

Change-Id: I0579b19155529f397003eef80dea02f2e75fd00a
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

MA-19967 Revert "MA-19337 Revert "PM / Domains: Support enter deepest state for multiple states domains""

The last time it was reverted, because of structure changes that
blocks gki. To fix [8QM & 8QXP] Power consumption increased in
suspend mode, I plan to use a CONFIG to distinguish 8m* and 8q*.

This reverts commit 0c6748b7.

Change-Id: Ifce0f9d592e96ba691042e45f41ad3392b8a341f

Add pcm512 audio card to powersave image.
Enable powersave image LPA.

Change-Id: I049621f8bb60e53a9eb6eb12926c1ae9044a2864
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

On the i.MX8M*, the TF-A exposes a SiP (Silicon Provider) service
for DDR frequency scaling. The imx8m-ddrc-devfreq driver calls the
SiP and then does clk_set_parent on the DDR muxes to synchronize
the clock tree.

Since 936c3836 ("clk: imx: fix composite peripheral flags"),
these TF-A managed muxes have SET_PARENT_GATE set, which results
in imx8m-ddrc-devfreq's clk_set_parent after SiP failing with -EBUSY:

clk_set_parent(dram_apb_src, sys1_pll_40m);(busfreq-imx8mq.c)

This is safe to do, because updating the Linux clock tree to reflect
reality will always be glitch-free.

Since 926bf912("clk: imx8m: fix clock tree update of TF-A
managed clocks"), it adds this method and enables 8mm, 8mn and 8mq. I
think 8mp is also needed.

Another reason I added this patch is that powersave image BT music
requires dram to be 400MTS, so clk_set_parent(dram_alt_src,
sys1_pll_800m); is required. Without this patch, it will not succeed.

Change-Id: I4f07573dea4ac9a8a88b04cf795b346299940635
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

Even driver don't support alpha in imx8ulp, still add DRM_FORMAT_ARGB8888 format
for primary plane. Because android recovery mode only support DRM_FORMAT_RGBA8888,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_BGRA8888.
So declare DRM_FORMAT_ARGB8888 is supported in driver and discard the alpha when
set format for framebuffer.

Change-Id: I81e1d36565f61ee5425d34fb672a531ecebd9155
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>

this patch register the gpu cooling device for node "devfreq", thermal policy
thermal_of_populate_bind_params in thermal_of.c will bind the cooling device
and trip point from the map, remove the previous implementation "bind every
thermal zone registered in dts with gpu cooling device thermal-devfreq-%d".

Change-Id: I1240a64d00ac702da19c47da525d67ae6c2c4428
Signed-off-by: Dandan Sun <dandan.sun@nxp.com>

this patch put the thermal zone and gpu cooling device bind in dts,
register the gpu cooling device for node "devfreq", thermal policy
thermal_of_populate_bind_params in thermal_of.c will bind the cooling
device and trip point from the map.

Change-Id: I0607eda3219981514b05b8057ce485498e401cb7
Signed-off-by: Dandan Sun <dandan.sun@nxp.com>

in current implementation, bind every thermal zone registered in dts
with one cooling device "thermal-devfreq-%d", and add
notifier_call_chain when register cooling device, use step_wise
governor, step_wise_throttle compute state based on the temp trend,
and if need to throttle, do process step_wise_throttle ->
thermal_cdev_update ->thermal_cdev_set_cur_state -> set_cur_state
-> devfreq_cooling_notifier_call_chain(state) ->
gpu driver receive state notifier, and change gpu freq.

Issue of current implementation: in current implementation,
whatever the thermal sensor is, always trigger gpu freq change,
this is not proper, cpu thermal sensor and drc thermal sensor
should not bind with gpu cooling device.

Solution: this patch change to put the bind in dts, make it more clear.
register the gpu cooling device for node "devfreq", thermal policy
thermal_of_populate_bind_params in thermal_of.c will bind the cooling
device and trip point from the map.

this patch put gpufreq cooling device register in gpu driver, thermal
driver can use devfreq_cooling_handle_event_change to handle gpufreq
adjustment according to the temp change.

Change-Id: I563b8d7669d915a6dce24ce8621a1bd3f64abc4d
Signed-off-by: Dandan Sun <dandan.sun@nxp.com>

Add pcm512 audio card to powersave image.
Enable powersave image LPA.

Change-Id: I049621f8bb60e53a9eb6eb12926c1ae9044a2864
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

Signed-off-by: Ondrej Lutera <ondrej.lutera@nxp.com>

On the i.MX8M*, the TF-A exposes a SiP (Silicon Provider) service
for DDR frequency scaling. The imx8m-ddrc-devfreq driver calls the
SiP and then does clk_set_parent on the DDR muxes to synchronize
the clock tree.

Since 936c3836 ("clk: imx: fix composite peripheral flags"),
these TF-A managed muxes have SET_PARENT_GATE set, which results
in imx8m-ddrc-devfreq's clk_set_parent after SiP failing with -EBUSY:

clk_set_parent(dram_apb_src, sys1_pll_40m);(busfreq-imx8mq.c)

This is safe to do, because updating the Linux clock tree to reflect
reality will always be glitch-free.

Since 926bf912("clk: imx8m: fix clock tree update of TF-A
managed clocks"), it adds this method and enables 8mm, 8mn and 8mq. I
think 8mp is also needed.

Another reason I added this patch is that powersave image BT music
requires dram to be 400MTS, so clk_set_parent(dram_alt_src,
sys1_pll_800m); is required. Without this patch, it will not succeed.

Change-Id: I4f07573dea4ac9a8a88b04cf795b346299940635
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>

evk_8mn will meet system hang when resume (using
"echo mem > /sys/power/state" to make system suspend
while display on).
The reason is that imx-drm driver resumes before
imx-lcdif driver, and access some hardware while
those resources not ready.

fw_devlink will affect the suspend/resume sequence
by parsing dts to create dependency btw drivers.
But these two drivers doesn't have supported dts
property for fw_devlink.

This patch explicitly defers the suspend sequence
of imx-lcdif driver to fix it.

Change-Id: Ifd266101650c07fecdbfcbdcb9231f9aa4b4f70a
Signed-off-by: Jindong Yue <jindong.yue@nxp.com>

Update gc_feature_database.h to 429850

Change-Id: I5b630fb43354ed12e71fe0736b6c20806ab1cb83
Signed-off-by: yuan.tian <yuan.tian@nxp.com>

6.4.x_234062: Merge
 CL430717 from 6.4.x. Fix Bug 31480. HW bug 2030, accoriding to the feature
 bit gcvFEATURE_BIT_PE_64BPP_LINEAR_FORMAT to deteminate whether to support
 64BPP to draw clear. By: xuan.huang.

Signed-off-by: Ke Feng <ke.feng@verisilicon.com>

Change-Id: I0acd7c6e7e9306114a19b6ae798fdc9292bc8b29
Signed-off-by: yuan.tian <yuan.tian@nxp.com>

64x_234062, imx-2693:
 Implemented YUV planar formats to YUY2 packed format conversion using compute
 shader to avoid UI freeze when playing youtube with ads on MP Android
 platform.

Signed-off-by: Ke Feng <ke.feng@verisilicon.com>

Change-Id: I4294634f240a4a8a541986cb92f84a6991ff2d5f
Signed-off-by: yuan.tian <yuan.tian@nxp.com>

Add compat_ioctl file_operation for dma-buf-imx
driver for 32/64 binary ioctl compatable.
Also update head file to use __u32 and uint64_t
type to avoid 32/64 compatable issue.

Change-Id: I92040d6b2c3e3fac9af9b3e16f6fc6638a5f6c58
Signed-off-by: yang.tian <yang.tian@nxp.com>

The minimum clock of GPU is variable and can be set through sysfs file
/sys/bus/platform/drivers/galcore/gpu3DMinClock. This value should read every
time when thermal event generated.
The original scale of GPU frequence is the one when boot up.

Change-Id: I6f1786ae46403d216f3f6dbf715c1aa332cd3351
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>

CL433206 [KERNEL SPACE] After the internal command is executed,
check the idle status of other modules to determine whether the command is executed.

Signed-off-by: Ke Feng <ke.feng@verisilicon.com>
Signed-off-by: Jiyu Yang <jiyu.yang@nxp.com>

does not use this driver

Because the hantro driver is built in on imx8m boards
except imx8mq. But hantro driver need api of trusty driver,
and trusty driver is build as module.

So there will be build error: "error: undefined symbol:
trusty_fast_call32"

We should disable hantro driver on imx8mm/imx8mp/imx8mn/imx8ulp boards.

Change-Id: Ifb6badc092efa2de16bc41b7e2dfb79376cdde1d
Signed-off-by: zhai.he <zhai.he@nxp.com>

For the use of registers, the decoder are all passed to TEE through smc.
Use trusty_vpu_write/read to wrap the smc interface and iowrite32/ioread32,
for sensitive registers such as input and output,we use the OPT_SECURE_WRITE
smc type to store the buffer address in the TEE cache.When the decoding is
started, the VPU is turned on through the OPT_SECURE_CTRL_WRITE type
smc interface.

Change-Id: I06ee0cb493d2620204e9b3fdc08d636bff920f83
Signed-off-by: zhai.he <zhai.he@nxp.com>

Change-Id: I0f5c4a24611ceee7ecaa06cf68d74a3841b32dfb
Signed-off-by: zhai.he <zhai.he@nxp.com>

It is ready to use GKI boot.img

Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Change-Id: Ibfc83f6dcb4fba2a7b531cb9e4c0d019ba89f116

CONFIG_FB_DEFERRED_IO will change the struct fb_info,
then break the GKI image boot:
  pwm_bl: disagrees about version of symbol backlight_device_register

Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Change-Id: I09efbf6baeaba16e68ae7a24bf33f9ed05907cdc

Split lpuart early console driver from fsl_lpuart.c
to imx_earlycon.c

Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Change-Id: I55ec183aa6039e4666e985053caf669b78fef5b8