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Commit 509fe6bf authored by Zhipeng Wang's avatar Zhipeng Wang
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MA-19930 clk: imx8mp: fix clock tree update of TF-A managed clocks


On the i.MX8M*, the TF-A exposes a SiP (Silicon Provider) service
for DDR frequency scaling. The imx8m-ddrc-devfreq driver calls the
SiP and then does clk_set_parent on the DDR muxes to synchronize
the clock tree.

Since 936c3836 ("clk: imx: fix composite peripheral flags"),
these TF-A managed muxes have SET_PARENT_GATE set, which results
in imx8m-ddrc-devfreq's clk_set_parent after SiP failing with -EBUSY:

clk_set_parent(dram_apb_src, sys1_pll_40m);(busfreq-imx8mq.c)

This is safe to do, because updating the Linux clock tree to reflect
reality will always be glitch-free.

Since 926bf912("clk: imx8m: fix clock tree update of TF-A
managed clocks"), it adds this method and enables 8mm, 8mn and 8mq. I
think 8mp is also needed.

Another reason I added this patch is that powersave image BT music
requires dram to be 400MTS, so clk_set_parent(dram_alt_src,
sys1_pll_800m); is required. Without this patch, it will not succeed.

Change-Id: I4f07573dea4ac9a8a88b04cf795b346299940635
Signed-off-by: default avatarZhipeng Wang <zhipeng.wang_1@nxp.com>
parent 183fcab5
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