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sent/20240605-topic-sm8650-upstream-hdk-iommu-fix-542619065c45-v16ab9a458 · ·
(no cover subject) To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): arm64: dts: qcom: sm8650-hdk: allow more IOMMU SID for the first QUP instance arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 2 ++ 1 file changed, 2 insertions(+) --- base-commit: 234cb065ad82915ff8d06ce01e01c3e640b674d2 change-id: 20240605-topic-sm8650-upstream-hdk-iommu-fix-542619065c45 Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-dwc2-subnodes-4a68ead79624-v1e1253803 · ·
(no cover subject) To: Greg Kroah-Hartman <gregkh@linuxfoundation.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: usb: dwc2: allow device sub-nodes Documentation/devicetree/bindings/usb/dwc2.yaml | 7 +++++++ 1 file changed, 7 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-dwc2-subnodes-4a68ead79624 Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-audio-widgets-00e1afcda10b-v1aab8e274 · ·
(no cover subject) To: Jerome Brunet <jbrunet@baylibre.com> To: Liam Girdwood <lgirdwood@gmail.com> To: Mark Brown <broonie@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> Cc: alsa-devel@alsa-project.org Cc: linux-sound@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): ASoC: dt-bindings: amlogic,gx-sound-card: drop minItems for audio-widgets Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml | 1 - 1 file changed, 1 deletion(-) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-audio-widgets-00e1afcda10b Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-spifc-214a5af0f305-v146cc74fe · ·
(no cover subject) To: Mark Brown <broonie@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Martin Kurbanov <mmkurbanov@sberdevices.ru> Cc: linux-spi@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: spi: amlogic,a1-spifc: add missing power-domains Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-spifc-214a5af0f305 Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-sardac-0f9d22e7e558-v10559af94 · ·
(no cover subject) To: Jonathan Cameron <jic23@kernel.org> To: Lars-Peter Clausen <lars@metafoo.de> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-iio@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: iio: adc: amlogic,meson-saradc: add optional power-domains Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-sardac-0f9d22e7e558 Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-rng-c80f594e8a2b-v165fc4ac4 · ·
(no cover subject) To: Olivia Mackall <olivia@selenic.com> To: Herbert Xu <herbert@gondor.apana.org.au> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: rng: meson: add optional power-domains Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-rng-c80f594e8a2b Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-phy-fa8d34ea3efa-v1eb9ad4c9 · ·
(no cover subject) To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-phy@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: phy: g12a-usb2-phy: add optional power-domains Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-phy-fa8d34ea3efa Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-nvmem-7df0dd48b1a3-v1fed89ee1 · ·
(no cover subject) To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: nvmem: amlogic,meson-gx-efuse: add optional power-domains Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-nvmem-7df0dd48b1a3 Best regards,
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sent/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-mmc-a94d681d2e69-v106702bab · ·
(no cover subject) To: Ulf Hansson <ulf.hansson@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-mmc@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): dt-bindings: mmc: meson-gx: add optional power-domains Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml | 3 +++ 1 file changed, 3 insertions(+) --- base-commit: c3f38fa61af77b49866b006939479069cd451173 change-id: 20240605-topic-amlogic-upstream-bindings-fixes-power-domains-mmc-a94d681d2e69 Best regards,
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sent/20240229-topic-sm8x50-upstream-phy-combo-typec-mux-31b5252513c9-v2ec3aa840 · ·
arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode Register a typec mux in order to change the PHY mode on the Type-C mux events depending on the mode and the svid when in Altmode setup. The DisplayPort phy should be left enabled if is still powered on by the DRM DisplayPort controller, so bail out until the DisplayPort PHY is not powered off. The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states will be set in between of USB-Only, Combo and DisplayPort Only so this will leave enough time to the DRM DisplayPort controller to turn of the DisplayPort PHY. The patchset also includes bindings changes and DT changes. This has been successfully tested on an SM8550 board, but the Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort, PD USB Hubs and PD Altmode Dongles to make sure the switch works as expected. The DisplayPort 4 lanes setup can be check with: $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug name = msm_dp drm_dp_link rate = 540000 num_lanes = 4 ... This patchset depends on [1] to allow broadcasting the type-c mode to the PHY, otherwise the PHY will keep the combo state while the retimer would setup the 4 lanes in DP mode. [1] https://lore.kernel.org/all/20240527-topic-sm8x50-upstream-retimer-broadcast-mode-v1-0-79ec91381aba@linaro.org/ To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Changes in v2: - Reference usb-switch.yaml in bindings patch - Fix switch/case indenting - Check svid for USB_TYPEC_DP_SID - Fix X13s patch subject - Update SM8650 patch to enable 4 lanes on HDK aswell - Link to v1: https://lore.kernel.org/r/20240229-topic-sm8x50-upstream-phy-combo-typec-mux-v1-0-07e24a231840@linaro.org To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: linux-arm-msm@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- Neil Armstrong (7): dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to allow mode-switch phy: qcom: qmp-combo: store DP phy power state phy: qcom: qmp-combo: introduce QPHY_MODE phy: qcom: qmp-combo: register a typec mux to change the QPHY_MODE arm64: dts: qcom-sm8550: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch arm64: dts: qcom-sm8650: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 7 +- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 6 +- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 3 +- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 3 +- arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 3 +- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 3 +- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 169 +++++++++++++++++++-- 7 files changed, 174 insertions(+), 20 deletions(-) --- base-commit: d4eef8b2e18d3e4d2343fb3bb975f8ac4522129a change-id: 20240229-topic-sm8x50-upstream-phy-combo-typec-mux-31b5252513c9 Best regards,
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sent/20240527-topic-sm8x50-upstream-retimer-broadcast-mode-76520768ac3f-v1ce6df8ec · ·
usb: typec-mux: broadcast typec state to next mux for ptn36502 & nb7vpq904m retimers In the Type-C graph, a retimer is usually in between the USB-C connector and the USB3/DP combo PHY, and this PHY also requires the USB-C mode events to properly set-up the SuperSpeed Lanes functions to setup USB3-only, USB3 + DP Altmode or DP Altmode only on the 4 lanes. Update the nb7vpq904m & ptn36502 retimers to get an optional type-c mux on the next endpoint, and broadcast the received mode to it. This makes it possible to support 4-lanes DP altmode on Qualcomm platforms. To: Heikki Krogerus <heikki.krogerus@linux.intel.com> To: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Bjorn Andersson <andersson@kernel.org> Cc: Luca Weiss <luca.weiss@fairphone.com> Cc: linux-arm-msm@vger.kernel.org Cc: linux-usb@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (2): usb: typec-mux: ptn36502: broadcast typec state to next mux usb: typec-mux: nb7vpq904m: broadcast typec state to next mux drivers/usb/typec/mux/nb7vpq904m.c | 29 +++++++++++++++++++++++++++-- drivers/usb/typec/mux/ptn36502.c | 33 ++++++++++++++++++++++++++++++--- 2 files changed, 57 insertions(+), 5 deletions(-) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240527-topic-sm8x50-upstream-retimer-broadcast-mode-76520768ac3f Best regards,
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sent/20240425-topic-sm8650-upstream-hdk-gpu-24b42b72b127-v19d9640a2 · ·
(no cover subject) To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): arm64: dts: qcom: sm8650-hdk: enable GPU arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 8 ++++++++ 1 file changed, 8 insertions(+) --- base-commit: 3a01487d6106128530737d62f28c6a7833ff5ccf change-id: 20240425-topic-sm8650-upstream-hdk-gpu-24b42b72b127 Best regards,
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sent/20240422-amlogic-v6-9-upstream-deconfig-dsi-48e1bc73b4fd-v138b6af81 · ·
(no cover subject) To: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: khilman@baylibre.com Cc: jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): arm64: defconfig: enable Khadas TS050 panel as module arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) --- base-commit: 4cece764965020c22cff7665b18a012006359095 change-id: 20240422-amlogic-v6-9-upstream-deconfig-dsi-48e1bc73b4fd Best regards,
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sent/topic/sm8x50/upstream/pcie-1-phy-aux-clk-v4eae578ce · ·
arm64: qcom-sm8[456]50: properly describe the PCIe Gen4x2 PHY AUX clock The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock named "PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which is muxed & gated then returned to the PHY as an input. Document the clock IDs to select the PIPE clock or the AUX clock, also enforce a second clock-output-names and a #clock-cells value of 1 for the PCIe Gen4x2 PHY found in the SM8[456]50 SoCs. The PHY driver needs a light refactoring to support a second clock, and finally the DT is changed to connect the PHY second clock to the corresponding GCC input then drop the dummy fixed rate clock. To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: <linux-arm-msm@vger.kernel.org> Cc: <linux-phy@lists.infradead.org> Cc: <devicetree@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v4: - Fixed dtbs check error on sm8550-qrd.dtb after rebase on -next - Link to v3: https://lore.kernel.org/r/20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org Changes in v3: - Rebased on linux-next, applies now cleanly - Link to v2: https://lore.kernel.org/r/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-0-3ec0a966d52f@linaro.org Changes in v2: - Collected review tags - Switched back to of_clk_add_hw_provider/devm_add_action_or_reset to maintain compatibility - Tried to use generic of_clk_hw_onecell_get() but it requires to much boilerplate code and would still need a local qmp_pcie_clk_hw_get() to support the current #clock-cells=0 when exposing 2 clocks, so it's simpler to just return the clocks in qmp_pcie_clk_hw_get() - Link to v1: https://lore.kernel.org/r/20240319-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v1-0-926d7a4ccd80@linaro.org --- Neil Armstrong (3): arm64: dts: qcom: sm8450: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk arm64: dts: qcom: sm8550: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk arm64: dts: qcom: sm8650: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 19 ------------------- arch/arm64/boot/dts/qcom/sm8550.dtsi | 13 ++++--------- arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8650.dtsi | 13 ++++--------- 8 files changed, 12 insertions(+), 57 deletions(-) --- base-commit: f529a6d274b3b8c75899e949649d231298f30a32 change-id: 20240319-topic-sm8x50-upstream-pcie-1-phy-aux-clk-4b35169707dd Best regards,
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sent/topic/sm8650/upstream/hdk-v425005ad7 · ·
arm64: qcom: sm8650: add support for the SM8650-HDK board The SM8650-HDK is an embedded development platforms for the Snapdragon 8 Gen 3 SoC aka SM8650, with the following features: - Qualcomm SM8650 SoC - 16GiB On-board LPDDR5 - On-board WiFi 7 + Bluetooth 5.3/BLE - On-board UFS4.0 - M.2 Key B+M Gen3x2 PCIe Slot - HDMI Output - USB-C Connector with DP Almode & Audio Accessory mode - Micro-SDCard Slot - Audio Jack with Playback and Microphone - 2 On-board Analog microphones - 2 On-board Speakers - 96Boards Compatible Low-Speed and High-Speed connectors [1] - For Camera, Sensors and external Display cards - Compatible with the Linaro Debug board [2] - SIM Slot for Modem - Debug connectors - 6x On-Board LEDs An optional Display Card kit can be connected on top, an overlay is handled to add support for the DSI Display and Touch Controller. Product Page: [3] Build Dependencies: None Functional Dependencies: - PCIe 1 PHY AUX Clock: https://lore.kernel.org/all/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-0-3ec0a966d52f@linaro.org/ - PCI-MSI Fix: https://lore.kernel.org/all/20240318-pci-bdf-sid-fix-v1-3-acca6c5d9cf1@linaro.org/ - UCSI Fix: https://lore.kernel.org/all/20240315171836.343830-1-jthies@google.com/ - USB IRQs DT check fix: https://lore.kernel.org/all/20240314-topic-sm8650-upstream-usb-dt-irq-fix-v1-1-ea8ab2051869@linaro.org/ [1] https://www.96boards.org/specifications/ [2] https://git.codelinaro.org/linaro/qcomlt/debugboard [3] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/ To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: <linux-arm-msm@vger.kernel.org> Cc: <devicetree@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v4: - Rebased on next and fixed the apply failures - Link to v3: https://lore.kernel.org/r/20240325-topic-sm8650-upstream-hdk-v3-0-4f365d7932af@linaro.org Changes in v3: - fixed regulator node name to fix ordering - deleted pcie_1_phy_aux clock - removed undeeded mdss_mdp status okay - collected revied & tested tags - Link to v2: https://lore.kernel.org/r/20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org Changes in v2: - Fixed commit messages with links, and recently added product page URL - Swapped i2c3/i2c6 nodes - Moved pcie_1_phy_aux_clk under pcie1_phy - Removed duplicate mdp_vsync pinctrl state - Collected review & tested tags - Link to v1: https://lore.kernel.org/r/20240223-topic-sm8650-upstream-hdk-v1-0-ccca645cd901@linaro.org --- Neil Armstrong (3): dt-bindings: arm: qcom: Document the HDK8650 board arm64: dts: qcom: sm8650: add support for the SM8650-HDK board arch: arm64: dts: sm8650-hdk: add support for the Display Card overlay Documentation/devicetree/bindings/arm/qcom.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 5 + .../boot/dts/qcom/sm8650-hdk-display-card.dtso | 144 +++ arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1251 ++++++++++++++++++++ 4 files changed, 1401 insertions(+) --- base-commit: a8e1147ee205e7b8dfe18094ed39552a982857f1 change-id: 20240223-topic-sm8650-upstream-hdk-e21cfd6f1de8 Best regards,
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sent/topic/sm8650/upstream/ufs-g5-v16009d098 · ·
(no cover subject) To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> Cc: <linux-arm-msm@vger.kernel.org> Cc: <linux-phy@lists.infradead.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): phy: qcom: qmp-ufs: update SM8650 tables for Gear 4 & 5 drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h | 4 ++ .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 6 ++ drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 73 +++++++++++++++++----- 3 files changed, 68 insertions(+), 15 deletions(-) --- base-commit: 0112ca4447c2969b8106377a614f010ba85e4c9b change-id: 20240410-topic-sm8650-upstream-ufs-g5-b192e80a6c8f Best regards,
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sent/amlogic/v6.9/upstream/fix-clk-module-license-v1ab819644 · ·
To be applied after [1] [1] https://lore.kernel.org/all/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-0-99ecdfdc87fc@linaro.org/ To: Jerome Brunet <jbrunet@baylibre.com> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <linux-amlogic@lists.infradead.org> Cc: <linux-clk@vger.kernel.org> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): clk: meson: fix module license to GPL only drivers/clk/meson/axg-aoclk.c | 2 +- drivers/clk/meson/axg-audio.c | 2 +- drivers/clk/meson/axg.c | 2 +- drivers/clk/meson/clk-cpu-dyndiv.c | 2 +- drivers/clk/meson/clk-dualdiv.c | 2 +- drivers/clk/meson/clk-mpll.c | 2 +- drivers/clk/meson/clk-phase.c | 2 +- drivers/clk/meson/clk-pll.c | 2 +- drivers/clk/meson/clk-regmap.c | 2 +- drivers/clk/meson/g12a-aoclk.c | 2 +- drivers/clk/meson/g12a.c | 2 +- drivers/clk/meson/gxbb-aoclk.c | 2 +- drivers/clk/meson/gxbb.c | 2 +- drivers/clk/meson/meson-aoclk.c | 2 +- drivers/clk/meson/meson-eeclk.c | 2 +- drivers/clk/meson/sclk-div.c | 2 +- drivers/clk/meson/vclk.c | 2 +- drivers/clk/meson/vid-pll-div.c | 2 +- 18 files changed, 18 insertions(+), 18 deletions(-) --- base-commit: a3c4ce7a4b9c1fe78f66afeea6eb89c68ef45f9c change-id: 20240408-amlogic-v6-9-upstream-fix-clk-module-license-34060f9b5192 Best regards,
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sent/amlogic/v6.9/upstream/dsi-ccf-vim3-v121c1c317c · ·
drm/meson: add support for MIPI DSI Display The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom glue managing the IP resets, clock and data input similar to the DW-HDMI glue on the same Amlogic SoCs. This is a follow-up of v5 now the DRM patches are applied, the clk & DT changes remains for a full DSI support on G12A & SM1 platforms. The DW-MIPI-DSI transceiver + D-PHY are clocked by the GP0 PLL, and the ENCL encoder + VIU pixel reader by the VCLK2 clock using the HDMI PLL. The DW-MIPI-DSI transceiver gets this pixel stream as input clocked with the VCLK2 clock. An optional "MEAS" clock can be enabled to measure the delay between each vsync feeding the DW-MIPI-DSI transceiver. The clock setup has been redesigned to use CCF, a common PLL (GP0) and the VCLK2 clock path for DSI in preparation of full CCF support and possibly dual display with HDMI. The change from v5 is that now we use a "VCLK" driver instead of notifier and rely on CLK_SET_RATE_GATE to ensure the VCLK gate operation are called. To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Kevin Hilman <khilman@baylibre.com> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: Maxime Ripard <mripard@kernel.org> To: Thomas Zimmermann <tzimmermann@suse.de> To: David Airlie <airlied@gmail.com> To: Daniel Vetter <daniel@ffwll.ch> To: Jagan Teki <jagan@amarulasolutions.com> To: Nicolas Belin <nbelin@baylibre.com> Cc: <devicetree@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org> Cc: <linux-amlogic@lists.infradead.org> Cc: <linux-clk@vger.kernel.org> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <dri-devel@lists.freedesktop.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v12: - fix parameters alignment in patch 2 - update g12a_mipi_dsi_pxclk_div_table comment with jerome's suggestions - fix dtbs overlay build, fix missed v11... thx khadas for reporting it off-list & testing - Link to v11: https://lore.kernel.org/r/20240325-amlogic-v6-4-upstream-dsi-ccf-vim3-v11-0-04f55de44604@linaro.org Changes in v11: - Rebased on v6.9-rc1 - Fixed overlay handling/creation - Link to v10: https://lore.kernel.org/r/20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org Changes in v10: - Rename regmap_vclk to meson_clk and add _gate for the gate - Move COMMON_CLK_MESON_VCLK to following patch - Remove CLK_SET_RATE_PARENT from g12a_vclk2_sel, keep it only on mipi_dsi_pxclk_sel - Add more info on commit message to specify how clock setup is designed - Remove forgotten CLK_IGNORE_UNUSED on g12a_vclk2_input - Remove useless CLK_SET_RATE_PARENT on g12a_vclk2_div to stop propagatting rate _after_ vclk2_div - Remove invalid CLK_SET_RATE_GATE on g12a_vclk2 since it's not a divider... - Drop already applied patches - move Khadas TS050 changes as an overlay - Link to v9: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-0-95256ed139e6@linaro.org Changes in v9: - Colledte reviewed-bys - Fixed patches 2 & 4, commit messages and bindings format - Link to v8: https://lore.kernel.org/r/20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda193@linaro.org Changes in v8: - Switch vclk clk driver to parm as requested by Jerome - Added bindings fixes to amlogic,meson-axg-mipi-pcie-analog & amlogic,g12a-mipi-dphy-analog - Fixed DT errors in vim3 example and MNT Reform DT - Rebased on next-20231107, successfully tested on VIM3L - Link to v7: https://lore.kernel.org/r/20230803-amlogic-v6-4-upstream-dsi-ccf-vim3-v7-0-762219fc5b28@linaro.org Changes in v7: - Added review tags - Fixed patch 5 thanks to George - Link to v6: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v6-0-fd2ac9845472@linaro.org Changes in v6: - dropped applied DRM patches - dropped clk private prefix patches - rebased on top of 20230607-topic-amlogic-upstream-clkid-public-migration-v2-0-38172d17c27a@linaro.org - re-ordered/cleaned ENCL patches to match clkid public migration - Added new "vclk" driver - uses vclk driver instead of notifier - cleaned VCLK2 clk flags - add px_clk gating from DSI driver - Link to v5: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v5-0-56eb7a4d5b8e@linaro.org Changes in v5: - Aded PRIV all the G12 internal clk IDS to simplify public exposing - Fixed the DSI bindings - Fixed the DSI HSYNC/VSYNC polarity handling - Fixed the DSI clock setup - Fixed the DSI phy timings - Dropped components for DSI, only keeping it for HDMI - Added MNT Reform 2 CM4 DT - Dropped already applied PHY fix - Link to v4: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-0-2592c29ea263@linaro.org Changes from v3 at [3]: - switched all clk setup via CCF - using single PLL for DSI controller & ENCL encoder - added ENCL clocks to CCF - make the VCLK2 clocks configuration by CCF - fixed probe/bind of DSI controller to work with panels & bridges - added bit_clk to controller to it can setup the BIT clock aswell - added fix for components unbind - added fix for analog phy setup value - added TS050 timings fix - dropped previous clk control patch Changes from v2 at [2]: - Fixed patch 3 - Added reviews from Jagan - Rebased on v5.19-rc1 Changes from v1 at [1]: - fixed DSI host bindings - add reviewed-by tags for bindings - moved magic values to defines thanks to Martin's searches - added proper prefixes to defines - moved phy_configure to phy_init() dw-mipi-dsi callback - moved phy_on to a new phy_power_on() dw-mipi-dsi callback - correctly return phy_init/configure errors to callback returns [1] https://lore.kernel.org/r/20200907081825.1654-1-narmstrong@baylibre.com [2] https://lore.kernel.org/r/20220120083357.1541262-1-narmstrong@baylibre.com [3] https://lore.kernel.org/r/20220617072723.1742668-1-narmstrong@baylibre.com --- Neil Armstrong (7): dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module clk: meson: add vclk driver clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF drm/meson: gate px_clk when setting rate arm64: meson: g12-common: add the MIPI DSI nodes arm64: meson: khadas-vim3l: add TS050 DSI panel overlay arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + arch/arm64/boot/dts/amlogic/Makefile | 5 + arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 ++++ .../meson-g12b-bananapi-cm4-mnt-reform2.dts | 384 +++++++++++++++++++++ .../boot/dts/amlogic/meson-khadas-vim3-ts050.dtso | 108 ++++++ drivers/clk/meson/Kconfig | 5 + drivers/clk/meson/Makefile | 1 + drivers/clk/meson/g12a.c | 76 ++-- drivers/clk/meson/vclk.c | 141 ++++++++ drivers/clk/meson/vclk.h | 51 +++ drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 + 11 files changed, 829 insertions(+), 20 deletions(-) --- base-commit: 4cece764965020c22cff7665b18a012006359095 change-id: 20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-b8e5217e1f4a Best regards,
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sent/amlogic/v6.9/upstream/dsi-ccf-vim3-v11a3c4ce7a · ·
drm/meson: add support for MIPI DSI Display The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom glue managing the IP resets, clock and data input similar to the DW-HDMI glue on the same Amlogic SoCs. This is a follow-up of v5 now the DRM patches are applied, the clk & DT changes remains for a full DSI support on G12A & SM1 platforms. The DW-MIPI-DSI transceiver + D-PHY are clocked by the GP0 PLL, and the ENCL encoder + VIU pixel reader by the VCLK2 clock using the HDMI PLL. The DW-MIPI-DSI transceiver gets this pixel stream as input clocked with the VCLK2 clock. An optional "MEAS" clock can be enabled to measure the delay between each vsync feeding the DW-MIPI-DSI transceiver. The clock setup has been redesigned to use CCF, a common PLL (GP0) and the VCLK2 clock path for DSI in preparation of full CCF support and possibly dual display with HDMI. The change from v5 is that now we use a "VCLK" driver instead of notifier and rely on CLK_SET_RATE_GATE to ensure the VCLK gate operation are called. To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> To: Kevin Hilman <khilman@baylibre.com> To: Jerome Brunet <jbrunet@baylibre.com> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Martin Blumenstingl <martin.blumenstingl@googlemail.com> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: Maxime Ripard <mripard@kernel.org> To: Thomas Zimmermann <tzimmermann@suse.de> To: David Airlie <airlied@gmail.com> To: Daniel Vetter <daniel@ffwll.ch> To: Nicolas Belin <nbelin@baylibre.com> To: Jagan Teki <jagan@amarulasolutions.com> Cc: <devicetree@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org> Cc: <linux-amlogic@lists.infradead.org> Cc: <linux-clk@vger.kernel.org> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <dri-devel@lists.freedesktop.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v11: - Rebased on v6.9-rc1 - Fixed overlay handling/creation - Link to v10: https://lore.kernel.org/r/20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org Changes in v10: - Rename regmap_vclk to meson_clk and add _gate for the gate - Move COMMON_CLK_MESON_VCLK to following patch - Remove CLK_SET_RATE_PARENT from g12a_vclk2_sel, keep it only on mipi_dsi_pxclk_sel - Add more info on commit message to specify how clock setup is designed - Remove forgotten CLK_IGNORE_UNUSED on g12a_vclk2_input - Remove useless CLK_SET_RATE_PARENT on g12a_vclk2_div to stop propagatting rate _after_ vclk2_div - Remove invalid CLK_SET_RATE_GATE on g12a_vclk2 since it's not a divider... - Drop already applied patches - move Khadas TS050 changes as an overlay - Link to v9: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-0-95256ed139e6@linaro.org Changes in v9: - Colledte reviewed-bys - Fixed patches 2 & 4, commit messages and bindings format - Link to v8: https://lore.kernel.org/r/20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda193@linaro.org Changes in v8: - Switch vclk clk driver to parm as requested by Jerome - Added bindings fixes to amlogic,meson-axg-mipi-pcie-analog & amlogic,g12a-mipi-dphy-analog - Fixed DT errors in vim3 example and MNT Reform DT - Rebased on next-20231107, successfully tested on VIM3L - Link to v7: https://lore.kernel.org/r/20230803-amlogic-v6-4-upstream-dsi-ccf-vim3-v7-0-762219fc5b28@linaro.org Changes in v7: - Added review tags - Fixed patch 5 thanks to George - Link to v6: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v6-0-fd2ac9845472@linaro.org Changes in v6: - dropped applied DRM patches - dropped clk private prefix patches - rebased on top of 20230607-topic-amlogic-upstream-clkid-public-migration-v2-0-38172d17c27a@linaro.org - re-ordered/cleaned ENCL patches to match clkid public migration - Added new "vclk" driver - uses vclk driver instead of notifier - cleaned VCLK2 clk flags - add px_clk gating from DSI driver - Link to v5: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v5-0-56eb7a4d5b8e@linaro.org Changes in v5: - Aded PRIV all the G12 internal clk IDS to simplify public exposing - Fixed the DSI bindings - Fixed the DSI HSYNC/VSYNC polarity handling - Fixed the DSI clock setup - Fixed the DSI phy timings - Dropped components for DSI, only keeping it for HDMI - Added MNT Reform 2 CM4 DT - Dropped already applied PHY fix - Link to v4: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-0-2592c29ea263@linaro.org Changes from v3 at [3]: - switched all clk setup via CCF - using single PLL for DSI controller & ENCL encoder - added ENCL clocks to CCF - make the VCLK2 clocks configuration by CCF - fixed probe/bind of DSI controller to work with panels & bridges - added bit_clk to controller to it can setup the BIT clock aswell - added fix for components unbind - added fix for analog phy setup value - added TS050 timings fix - dropped previous clk control patch Changes from v2 at [2]: - Fixed patch 3 - Added reviews from Jagan - Rebased on v5.19-rc1 Changes from v1 at [1]: - fixed DSI host bindings - add reviewed-by tags for bindings - moved magic values to defines thanks to Martin's searches - added proper prefixes to defines - moved phy_configure to phy_init() dw-mipi-dsi callback - moved phy_on to a new phy_power_on() dw-mipi-dsi callback - correctly return phy_init/configure errors to callback returns [1] https://lore.kernel.org/r/20200907081825.1654-1-narmstrong@baylibre.com [2] https://lore.kernel.org/r/20220120083357.1541262-1-narmstrong@baylibre.com [3] https://lore.kernel.org/r/20220617072723.1742668-1-narmstrong@baylibre.com --- Neil Armstrong (7): dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module clk: meson: add vclk driver clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF drm/meson: gate px_clk when setting rate arm64: meson: g12-common: add the MIPI DSI nodes arm64: meson: khadas-vim3l: add TS050 DSI panel overlay arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + arch/arm64/boot/dts/amlogic/Makefile | 5 + arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 ++++ .../meson-g12b-bananapi-cm4-mnt-reform2.dts | 384 +++++++++++++++++++++ .../boot/dts/amlogic/meson-khadas-vim3-ts050.dtso | 108 ++++++ drivers/clk/meson/Kconfig | 5 + drivers/clk/meson/Makefile | 1 + drivers/clk/meson/g12a.c | 72 ++-- drivers/clk/meson/vclk.c | 141 ++++++++ drivers/clk/meson/vclk.h | 51 +++ drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 + 11 files changed, 825 insertions(+), 20 deletions(-) --- base-commit: 4cece764965020c22cff7665b18a012006359095 change-id: 20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-b8e5217e1f4a Best regards,
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sent/topic/sm8x50/upstream/leave-mdss-enabled-by-default-v15ad95abd · ·
(no cover subject) To: Bjorn Andersson <andersson@kernel.org> To: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> To: Conor Dooley <conor+dt@kernel.org> Cc: <linux-arm-msm@vger.kernel.org> Cc: <devicetree@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Neil Armstrong (1): arm64: dts: qcom: sm8650: remove useless enablement of mdss_mdp arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ---- 2 files changed, 8 deletions(-) --- base-commit: 4cece764965020c22cff7665b18a012006359095 change-id: 20240325-topic-sm8x50-upstream-leave-mdss-enabled-by-default-493739dcd1f3 Best regards,