Adds support for [SPV_KHR_relaxed_extended_instruction](https://gitlab.khronos.org/spirv/spirv-extensions/-/merge_requests/250

)

---------

Signed-off-by: Nathan Gauër <brioche@google.com>

* SPV_EXT_replicated_composites

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

* Move Composite instructions to "Composite" class

* Fix instruction classes

---------

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

The unused portions hadn't been updated so were overlapping the reserved
ranges.

Only for C and C++.

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

This is needed to add new features intercepting buffers content in
vksp.

* Register LLVM SPIR-V Backend as SPIR-V generator

* Change LLVM SPIR-V Backend vendor from "Intel" to "LLVM"

* Update spir-v.xml

* Update spir-v.xml

* Update spir-v.xml

Co-authored-by: Hans-Kristian Arntzen <post@arntzen-software.no>

* Headers support for SPV_INTEL_maximum_registers extension

* Use an operand kind for the named maximum number of registers

* apply CI suggestions

Test and install by default when the project is top level.

In any case, they can be controlled via CMake variables
SPIRV_HEADERS_ENABLE_TEST and SPIRV_HEADERS_ENABLE_INSTALL

Rename the simple test target to spirv_headers_simple_test

The Kernel requirement is already expressed transitively, since
these enums are only returned by OpImageQueryOrder and
OpImageQueryFormat, which require the Kernel capability.

Now that SPV_KHR_float_controls2 has been released, make the reference
explicit in the token reservations.

Some files in the tools directory are licensed with something
other than the Khronos license.  Update the root LICENSE file
to clearly point that out.

The XML file is MIT-licensed.

Also, massage the license text in a literal C++ string, so it
can more easily be recognized by linting tools.

This now passes license linting mechanisms inside Google.

* SPV_KHR_quad_control

 1. Add two new execute modes: RequireFullQuadsKHR and
    QuadDerivativesKHR
 2. Add one Capability: QuadControlKHR
 3. Add two opCodes: OpGroupNonUniformQuadAllKHR and
    OpGroupNonUniformQuadAnyKHR

* Regenerate headers, to fix end-of-line issues

---------

Co-authored-by: ruimzhao <ruimzhao@amd.com>

Co-authored-by: Jeff Bolz <jbolz@nvidia.com>

Bumps the github-actions group with 1 update: [actions/checkout](https://github.com/actions/checkout).


Updates `actions/checkout` from 3 to 4
- [Release notes](https://github.com/actions/checkout/releases)
- [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md)
- [Commits](https://github.com/actions/checkout/compare/v3...v4

)

---
updated-dependencies:
- dependency-name: actions/checkout
  dependency-type: direct:production
  update-type: version-update:semver-major
  dependency-group: github-actions
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>

* Publish the header for the vulkan-shader-profiler embedded reflection non-semantic instruction set

vulkan-shader-profiler is a tool based on perfetto to help vulkan
developer profil their applications.
First on the Host side using perfetto, but then using the extractor
and the runner, this tools allow to get inside about a shader using
counters (based on SPV_KHR_shader_clock)

* Update include/spirv/unified1/NonSemanticVkspReflection.h

Co-authored-by: Ben Ashbaugh <ben.ashbaugh@intel.com>

* Revert "Update include/spirv/unified1/NonSemanticVkspReflection.h"

This reverts commit 3c9c24db2949c59926bd25d777e10ab60ae2cb9c.

---------

Co-authored-by: Ben Ashbaugh <ben.ashbaugh@intel.com>

This extension allows TypeVector to have a physical pointer type
Component Type and introduces gather/scatter instructions.
It will be useful for explicitly vectorized kernels.

SPIR-V validator adjustments will be done later.

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

Signed-off-by: Joyce <joycebrum@google.com>

Errors were printed but did not stop processing and as a result the
related issues were not caught by CI checks.


Change-Id: I030c7ffe23a4730106a19e212895bef03b6ca456

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

Specification:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fpga_cluster_attributes.asciidoc

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

Relates to the recent change in SPIRV-Registry:  https://github.com/KhronosGroup/SPIRV-Registry/pull/222

Tabs and spaces mixed on the same line. It should all be spaces.

* Headers support for new FPGAMemoryAttributesINTEL

Implementation of three new FPGAMemoryAttributesINTEL:
 - StridesizeINTEL
 - WordsizeINTEL
 - TrueDualPortIntel

Specification: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fpga_memory_attributes.asciidoc

* Update_1

This is needed to implement 3D Image read using unnormalised sampler.
Ref google/clspv#1202

* Add a Source Language for Slang

* Changed src lang name from SLANG to Slang

* Register Slang Compiler for SPIR-V

* Added link to slang compiler repo

LiteralFloat was introduced with FPMaxErrorDecorationINTEL, but no entry in operand_kinds corresponds to it

* Add headers for SPV_NV_displacement_micromap.

* Review feedback 1

Co-authored-by: alan-baker <alanbaker@google.com>

---------

Co-authored-by: alan-baker <alanbaker@google.com>