* add basic utility code testing for cpp, cpp11, and c

* switch from building libraries to building executables for tests

* try adding a specific GitHub action to build with tests

* fix syntax for enabling tests

* remove commented out line so hpp11 tests should fail now

* Fix on header generator for c++11, regenerated products

Co-authored-by: Christian Conti

* fix enum starting with a number

* Add SPV_NV_cooperative_matrix2 and SPV_NV_tensor_addressing

* Apply suggestions from code review

Co-authored-by: Victor Lomuller <victor@codeplay.com>

---------

Co-authored-by: Victor Lomuller <victor@codeplay.com>

https://gitlab.khronos.org/spirv/SPIR-V/-/issues/817

Co-authored-by: Dan Brown <daniel.brown@amd.com>

* Add "aliases" fields to the grammar

Promotion of extensions lead to duplicated entries.
The patch introduce a new entry "aliases" to the grammar.
It is a list of strings, where each string is an alternative name for the token,
and applies on instructions and operand kind's enumerants.
The grammar is updated to use the fields and all duplicated were removed.

The header generator now processes the aliases when generating the headers to account for the change.
This ensure the generated headers doesn't change.

* Update grammar for SPV_EXT_optnone / SPV_INTEL_optnone

* Add SPV_EXT_arithmetic_fence

Spec:
https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/EXT/SPV_EXT_arithmetic_fence.html



Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

* Also add INTEL extension for tooling

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

* Revert "Also add INTEL extension for tooling"

This reverts commit ce256a38bc87d2f648bf385017cb201b527c01d8.

---------

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

* Rename SPV_INTEL_optnone to SPV_EXT_optnone

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

* keep intel names as well

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

---------

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>

* add support for SPV_INTEL_subgroup_buffer_prefetch

* add optional memory operands operand

* Update spirv generator contact info

* Use Steven for spiregg

Used by the following OpenCL extension: https://github.com/KhronosGroup/OpenCL-Docs/pull/1223




Change-Id: I2bffc986855a4c2960b5e0f851e52474754144a1

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

* Missed from #439

This is needed to add support for texel buffer to vksp.

* Support for SPV_KHR_untyped_pointers

* regenerate headers

Change-Id: I3b19b7ab42ba7bd5a87776fb21cb62451bb61683

See SPIR-V 1.6.4 change log

Specification: https://github.com/KhronosGroup/SPIRV-Registry/pull/254




Change-Id: I9406eff3371f0c3061a867ea9e50428dfefba911

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

The KHR suffix was missing. Fixing headers.

Signed-off-by: Nathan Gauër <brioche@google.com>

* Enforce grammar naming conventions for aliases

Fixes #429

* Enforce Core -> KHR -> EXT -> Vendor conventions for aliased names
* Update grammar to satisfy these conventions and regenerate headers

* Prevent duplicate (token,name) pairs

Adds support for [SPV_KHR_relaxed_extended_instruction](https://gitlab.khronos.org/spirv/spirv-extensions/-/merge_requests/250

)

---------

Signed-off-by: Nathan Gauër <brioche@google.com>

* SPV_EXT_replicated_composites

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

* Move Composite instructions to "Composite" class

* Fix instruction classes

---------

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

The unused portions hadn't been updated so were overlapping the reserved
ranges.

Only for C and C++.

Signed-off-by: Kevin Petit <kevin.petit@arm.com>

This is needed to add new features intercepting buffers content in
vksp.

* Register LLVM SPIR-V Backend as SPIR-V generator

* Change LLVM SPIR-V Backend vendor from "Intel" to "LLVM"

* Update spir-v.xml

* Update spir-v.xml

* Update spir-v.xml

Co-authored-by: Hans-Kristian Arntzen <post@arntzen-software.no>

* Headers support for SPV_INTEL_maximum_registers extension

* Use an operand kind for the named maximum number of registers

* apply CI suggestions

Test and install by default when the project is top level.

In any case, they can be controlled via CMake variables
SPIRV_HEADERS_ENABLE_TEST and SPIRV_HEADERS_ENABLE_INSTALL

Rename the simple test target to spirv_headers_simple_test

The Kernel requirement is already expressed transitively, since
these enums are only returned by OpImageQueryOrder and
OpImageQueryFormat, which require the Kernel capability.

Now that SPV_KHR_float_controls2 has been released, make the reference
explicit in the token reservations.

Some files in the tools directory are licensed with something
other than the Khronos license.  Update the root LICENSE file
to clearly point that out.

The XML file is MIT-licensed.

Also, massage the license text in a literal C++ string, so it
can more easily be recognized by linting tools.

This now passes license linting mechanisms inside Google.

* SPV_KHR_quad_control

 1. Add two new execute modes: RequireFullQuadsKHR and
    QuadDerivativesKHR
 2. Add one Capability: QuadControlKHR
 3. Add two opCodes: OpGroupNonUniformQuadAllKHR and
    OpGroupNonUniformQuadAnyKHR

* Regenerate headers, to fix end-of-line issues

---------

Co-authored-by: ruimzhao <ruimzhao@amd.com>