KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2075082



Cortex-A510's erratum #2077057 causes SPSR_EL2 to be corrupted when
single-stepping authenticated ERET instructions. A single step is
expected, but a pointer authentication trap is taken instead. The
erratum causes SPSR_EL1 to be copied to SPSR_EL2, which could allow
EL1 to cause a return to EL2 with a guest controlled ELR_EL2.

Because the conditions require an ERET into active-not-pending state,
this is only a problem for the EL2 when EL2 is stepping EL1. In this case
the previous SPSR_EL2 value is preserved in struct kvm_vcpu, and can be
restored.

Cc: stable@vger.kernel.org # 53960faf: arm64: Add Cortex-A510 CPU part definition
Cc: stable@vger.kernel.org
Signed-off-by: James Morse <james.morse@arm.com>
[maz: fixup cpucaps ordering]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220127122052.1584324-5-james.morse@arm.com


(cherry picked from commit 1dd498e5)
Signed-off-by: Gavin Shan <gshan@redhat.com>
Conflicts:
	Documentation/arm64/silicon-errata.rst
	arch/arm64/Kconfig
	arch/arm64/kernel/cpu_errata.c
	arch/arm64/tools/cpucaps
	Contextual conflicts in source files other than cpucaps.
	Conflicts in cupcaps due to lack of upstream commit 3bd94a87
	and 607a9afa, to support WORKAROUND_{2038923, 2064142).
	Drop the relevant changes in cpucaps.