The workaround for the "PSCI bug" on DragonBoard 410c implemented in
arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register
by storing the CurrentEL in there. When running in EL1, the mode switch
sequence implemented there later clears the register again, but this is
skipped when U-Boot is booted in EL2.

This causes crashes in the mach-snapdragon board_fdt_blob_setup() later,
because the invalid address stored in x0 gets dereferenced to check if it
points to a valid DTB.

We can't rely on having a valid values in the CPU registers for the first
stage bootloader configuration on DB410c, and nothing would place a DTB
there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0
hook case to avoid crashing with the clobbered register value.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>