Add path of the GPU firmware for the SM8650-QRD board

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

Add GPU nodes for the SM8650 platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

Unlike the the very close A740 GPU on the SM8550 SoC, the A750 GPU
doesn't have an HWCFG block but a separate register set.

The missing registers are added in the a6xx.xml.h file that would
require a subsequent sync and the non-existent hwcfg is handled
in a6xx_set_hwcg().

The A750 GPU info are added under the adreno_is_a750() macro and
the ADRENO_7XX_GEN3 family id.

This adds:
- DT nodes

Dependencies: None

Tested using Mesa's !26934 Merge Request [0] on the SM8650-QRD
and with kmscube & vkcube to test basic rendering.

[0] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26934



Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Changes in v4:
- Dropped applied patches
- Added a few more OPPs that are safe on all SKUs
- Link to v3: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-0-eb1f4b86d8d3@linaro.org

Changes in v3:
- Fixed smmu bindings if condition for GMU smmu
- Collected reviews
- Link to v2: https://lore.kernel.org/r/20240215-topic-sm8650-gpu-v2-0-6be0b4bf2e09@linaro.org

Changes in v2:
- Added separate a6xx.xml.h sync from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576
- Collected review tags
- Inlined skip_programming
- Use A7XX_RBBM_CGC_P2S_STATUS_TXDONE instead of BIT(0)
- Drop now useless placeholder comment
- Removed interconnect properties
- Rebased on current linux-next
- Link to v1: https://lore.kernel.org/r/20240212-topic-sm8650-gpu-v1-0-708a40b747b5@linaro.org

--- b4-submit-tracking ---
# This section is used internally by b4 prep for tracking purposes.
{
  "series": {
    "revision": 4,
    "change-id": "20240208-topic-sm8650-gpu-489d5e2c2b17",
    "prefixes": [],
    "history": {
      "v1": [
        "20240212-topic-sm8650-gpu-v1-0-708a40b747b5@linaro.org"
      ],
      "v2": [
        "20240215-topic-sm8650-gpu-v2-0-6be0b4bf2e09@linaro.org"
      ],
      "v3": [
        "20240216-topic-sm8650-gpu-v3-0-eb1f4b86d8d3@linaro.org"
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  }
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Krzysztof authored 1 year ago and Neil Armstrong committed 1 year ago

The driver disables RX path clock in SND_SOC_DAPM_POST_PMD of
rx_macro_enable_interp_clk() and rx_macro_enable_mix_path().  Make the
code symmetrical by enabling the clock in SND_SOC_DAPM_PRE_PMU.  This
also matches downstream Qualcomm driver for Qualcomm SM8550 SoC.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

Srini Kandagatla authored 2 years ago and Neil Armstrong committed 1 year ago

For some reason on wsa883x we see Port Collision during bank swith,
adding a delay seems provide a good workaround for this.

Needs more investigation.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
(cherry picked from commit 32d454e57c2996099cb3a1920db5319f1eef6fa2)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
(cherry picked from commit 1c86659340653842a6c5d3452250024c0c025dc1)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

# Conflicts:
#	Documentation/process/changes.rst
#	rust/Makefile

Merge branch 'libnvdimm-for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm.git

# Conflicts:
#	Documentation/userspace-api/index.rst

# Conflicts:
#	drivers/remoteproc/imx_dsp_rproc.c