- Apr 21, 2023
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Add support for Qualcomm QRB5165-RB5 evaluation board (based on Qualcomm QRB5165 SoC). Features: - Qualcomm Snapdragon QRB5165 (Robotics version of SM8250 SoC). - 2GiB RAM (on-board) [max: 8 GiB]. - 16GiB eMMC, uSD slot. U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qrb5165-rb5.rst. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Currently this pinctrl driver only supports debug UART specific pin configuration. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Currently the SM8250 clock driver initializes clocks for debug UART only. Along with this import "qcom,gcc-sm8250.h" header from Linux mainline to support DT bindings. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> [Bhupesh: Import regulator dt-bindings as well] Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> [vzapolskiy: updated commit message, fixed typo in dts compatible value] Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Several Qualcomm SoCs support QUSB2 USB PHY (for e.g. SM6115 and SDM845 - the corresponding boards being QRB4210-RB2 and Dragonboard845c-RB3). Add PHY driver for the same. Using this driver, the USB Hub connected on board on RB2, can be successfully enumerated via '> usb start'. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Import phy-qcom-qusb2.h from Linux to allow standard macros to be used for Qualcomm QUSB2 PHY ids. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Vladimir Zapolskiy authored
Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
The change includes a number of updates: * add a new GENI SE QUP driver, * add an option to load raw initrd images, * update configuration according to changes done for RB1, * resync with savedefconfig output. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
The change adds a description of GENI SE QUP wrapper IP over debug UART, also clock-names property is corrected and UART comaptible is rewritten. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
Trivial but necessary fix to the board dts file. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
All critical device drivers are preallocated, thus there is no need to mark corresponding device tree nodes for preallocation in U-Boot, in addition remove two generic unused included dtsi files. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
There is a typo in 'clocks' property name, also resets and some secondary properties were missing in the SDHC device tree nodes. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
It's unclear why the board got a dtsi file instead of dts, the change corrects it. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
Since the set target is to get updated FDT memory nodes, it's necessary to add two helper routines into the board file. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Add support for Qualcomm QRB4210-RB2 evaluation board (based on Qualcomm QRB4210 SoC). Features: - Qualcomm Snapdragon QRB4210 (Robotics version of SM6115 SoC). - 2GiB RAM (on-board) [max: 8 GiB]. - 16GiB eMMC, uSD slot. U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qrb4210-rb2.rst. [vzapolskiy: removed FIT image related files, added OF_HAS_PRIOR_STAGE] Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Currently this pinctrl driver only supports debug UART specific pin configuration. [vzapolskiy: renamed property to the one found in Linux] Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Currently the SM6115 clock driver initializes clocks for debug UART only. Along with this import "qcom,gcc-sm6115.h" header from Linux mainline to support DT bindings. [vzapolskiy: simplified, merged with resets, updated path to include directory] Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Import qcom,gcc-sm6115.h from Linux to allow standard macros to be used as clock ids. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Vladimir Zapolskiy authored
Enable GENI SE QUP wrapper driver to get a correct UART baudrate on RB1 board. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Vladimir Zapolskiy authored
Resync RB1 board defconfig and add CONFIG_SUPPORT_RAW_INITRD option to be able to skip initrd relocation stage. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Add basic support for the Qualcomm Robotics RB1 board based on the QRB2210 SoC (which in turn is based on the QCM2290 SoC). Along with a basic board description, ship a snapshot of the upstream Linux device tree as of commit [FILLMEIN]. [vzapolskiy: removed FIT image configuration file, mock.dts, clock driver] Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Vladimir Zapolskiy authored
Extracted from Konrad's RB1 board support changes. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Vladimir Zapolskiy authored
Describe QCM2290 reset table, SDCC2 and UART4 clocks. [vzapolskiy: added SoC build infra and clock changes extracted from RB1 board commit] Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Vladimir Zapolskiy authored
Copied pm2250.dtsi and qcm2290.dtsi from Konrad's RB1 board support, in turn the files were copied from Linux. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
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Import the necessary QCM2290 bindings from Linux as of commit next-20230220. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Qualcomm's clock controller blocks are actually do much more than it says on the tin.. They provide clocks, resets and power domains. Currently, U-Boot required one to spawn 2 separate devices for controlling clocks and resets, both spanning the same register space. Refactor the code to make it work with just a single DT node, making it compatible with upstream Linux bindings. While at it, take the liberty of slowly renaming 'msm' and 'snapdragon' to 'qcom' and drop unused compatibles. Heavily inspired by Renesas code for a similar hw block. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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In preparation for handling the clock and reset parts of the clock controller blocks (yes, I know, they're named 'clock controllers' but do much more, it wasn't me who chose the name!) without having to resort to creating two extra fake devices spanning the exact same register space, make the necessary header public. While at it, rename "snapdragon" to "qcom" as it's more appropriate and remove the out-of-place comment in the header. Note that its relocation in the files that include it is intentional and will be necessary for subsequent patches. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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IPQ40XX SoCs are not special in any way, shape or form, compared to other Qualcomm designs. Get rid of this artificial divide. The KConfig selects were dropped as keeping them creates a circular dependency chain plus they can be accounted for in defconfig. Only compile-tested. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Mark's and Dzmitry's approaches come down to the same thing.. Let's unify them by first removing the static keyword from the common file to allow the variable to be reused, then renaming "reg0" to the more sensible fw_dtb_pointer coming from the Apple file and finally remove the mach-apple implementation of this very thing and enable the common approach in the respective defconfig. Only build-tested. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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The simple-bus driver assigns the pre-reloc flag, which means it's not necessary to do it again in the device tree. Clean it up. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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