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  1. Sep 27, 2013
    • Rob Clark's avatar
      drm backport from v3.12-rc1 · 20ad4e02
      Rob Clark authored
      
      Sync to commit:
      
      commit 272b98c6
      Author:     Linus Torvalds <torvalds@linux-foundation.org>
      AuthorDate: Mon Sep 16 16:17:51 2013 -0400
      Commit:     Linus Torvalds <torvalds@linux-foundation.org>
      CommitDate: Mon Sep 16 16:17:51 2013 -0400
      
          Linux 3.12-rc1
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      20ad4e02
  2. Sep 23, 2013
  3. Sep 12, 2013
    • Wei Yongjun's avatar
      drm/msm: fix potential NULL pointer dereference · e49f78c4
      Wei Yongjun authored
      
      The dereference to 'pdata' should be moved below the NULL test.
      
      Signed-off-by: default avatarWei Yongjun <yongjun_wei@trendmicro.com.cn>
      e49f78c4
    • Rob Clark's avatar
      drm/msm: workaround for missing irq · d2cd7108
      Rob Clark authored
      
      Occasionally we seem to miss an IRQ from the ME (microengine).  I'm not
      entirely sure the root cause, but for now we can unwedge things by
      retiring from the hangcheck timer.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      d2cd7108
    • Rob Clark's avatar
      drm/msm: return -EBUSY if bo still active · a2d2441d
      Rob Clark authored
      
      When we CPU_PREP a bo with NOSYNC flag (for example, to implement
      PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE), an -EBUSY return indicates to
      userspace that the bo is still busy.  Previously it was incorrectly
      returning 0 in this case.
      
      And while we're in there throw in an bit of extra sanity checking in
      case userspace tries to wait for a bogus fence.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      a2d2441d
    • Wei Yongjun's avatar
      drm/msm: fix return value check in ERR_PTR() · 4eabfc37
      Wei Yongjun authored
      
      In case of error, the function drm_prime_pages_to_sg() returns ERR_PTR()
      and never returns NULL. The NULL test in the return value check should
      be replaced with IS_ERR().
      
      Signed-off-by: default avatarWei Yongjun <yongjun_wei@trendmicro.com.cn>
      4eabfc37
    • Rob Clark's avatar
      drm/msm: fix cmdstream size check · 26da0c22
      Rob Clark authored
      Need to check size+offset against bo size (duh!).. now we have a test
      case to make sure I've done it right:
      
      https://github.com/freedreno/msmtest/blob/master/submittest.c
      
      
      
      Also, use DRM_ERROR() for error case traces, which makes debugging
      userspace easier when enabling debug traces is too much.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      26da0c22
    • Rob Clark's avatar
      drm/msm: hangcheck harder · eeaddc68
      Rob Clark authored
      
      If gpu locks up with the rptr shortly beyond the wrap-around point in
      the ringbuffer, because the rptr was not reset (but wptr is, by virtue
      of resetting rb->cur), we could end up in a scenario where we think
      there is not enough space in the ringbuffer for the next cmds.  And
      since the CP won't reset rptr until after processing an IB, this leaves
      things in a sort of deadlock.
      
      So reset rptr too.  And a bit more spiffing up of hangcheck to make
      things easier to debug.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      eeaddc68
    • Rob Clark's avatar
      drm/msm: handle read vs write fences · 97da373b
      Rob Clark authored
      
      The userspace API already had everything needed to handle read vs write
      synchronization.  This patch actually bothers to hook it up properly, so
      that we don't need to (for example) stall on userspace read access to a
      buffer that gpu is also still reading.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      97da373b
    • Rob Clark's avatar
      drm/msm: convert to drm_bridge · 095bb00a
      Rob Clark authored
      
      Drop the msm_connector base class, and special calls to base class
      methods from the encoder, and use instead drm_bridge.  This allows for a
      cleaner division between the hdmi (and in future dsi) blocks, from the
      mdp block.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      095bb00a
    • Keith Packard's avatar
      drm: Pass page flip ioctl flags to driver · e9cb2928
      Keith Packard authored
      
      This lets drivers see the flags requested by the application
      
      [airlied: fixup for rcar/imx/msm]
      
      Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
      Signed-off-by: default avatarDave Airlie <airlied@gmail.com>
      
      Conflicts:
      	drivers/staging/imx-drm/ipuv3-crtc.c
      e9cb2928
    • Rob Clark's avatar
      drm/msm: add basic hangcheck/recovery mechanism · 1ef20e87
      Rob Clark authored
      
      A basic, no-frills recovery mechanism in case the gpu gets wedged.  We
      could try to be a bit more fancy and restart the next submit after the
      one that got wedged, but for now keep it simple.  This is enough to
      recover things if, for example, the gpu hangs mid way through a piglit
      run.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      1ef20e87
    • Rob Clark's avatar
      drm/msm: add a3xx gpu support · 9c0f6fa7
      Rob Clark authored
      
      Add initial support for a3xx 3d core.
      
      So far, with hardware that I've seen to date, we can have:
       + zero, one, or two z180 2d cores
       + a3xx or a2xx 3d core, which share a common CP (the firmware
         for the CP seems to implement some different PM4 packet types
         but the basics of cmdstream submission are the same)
      
      Which means that the eventual complete "class" hierarchy, once
      support for all past and present hw is in place, becomes:
       + msm_gpu
         + adreno_gpu
           + a3xx_gpu
           + a2xx_gpu
         + z180_gpu
      
      This commit splits out the parts that will eventually be common
      between a2xx/a3xx into adreno_gpu, and the parts that are even
      common to z180 into msm_gpu.
      
      Note that there is no cmdstream validation required.  All memory access
      from the GPU is via IOMMU/MMU.  So as long as you don't map silly things
      to the GPU, there isn't much damage that the GPU can do.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      9c0f6fa7
    • Rob Clark's avatar
      drm/msm: add register definitions for gpu · f1bfe0bc
      Rob Clark authored
      Generated from rnndb files in:
      
      https://github.com/freedreno/envytools
      
      
      
      Keep this split out as a separate commit to make it easier to review the
      actual driver.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      f1bfe0bc
    • Rob Clark's avatar
      drm/msm: basic KMS driver for snapdragon · 34cbd079
      Rob Clark authored
      
      The snapdragon chips have multiple different display controllers,
      depending on which chip variant/version.  (As far as I can tell, current
      devices have either MDP3 or MDP4, and upcoming devices have MDSS.)  And
      then external to the display controller are HDMI, DSI, etc. blocks which
      may be shared across devices which have different display controller
      blocks.
      
      To more easily add support for different display controller blocks, the
      display controller specific bits are split out into a "kms" module,
      which provides the kms plane/crtc/encoder objects.
      
      The external HDMI, DSI, etc. blocks are part encoder, and part connector
      currently.  But I think I will pull in the drm_bridge patches from
      chromeos tree, and split them into a bridge+connector, with the
      registers that need to be set in modeset handled by the bridge.  This
      would remove the 'msm_connector' base class.  But some things need to be
      double checked to make sure I could get the correct ON/OFF sequencing..
      
      This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
      (part of MDP4 block), and hdmi.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      34cbd079
    • Rob Clark's avatar
      drm/msm: add register definitions · ea56a63e
      Rob Clark authored
      Generated from rnndb files in:
      
      https://github.com/freedreno/envytools
      
      
      
      Keep this split out as a separate commit to make it easier to review the
      actual driver.
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      ea56a63e
    • Sean Paul's avatar
      drm: Add drm_bridge · 3d7036f8
      Sean Paul authored
      
      This patch adds the notion of a drm_bridge. A bridge is a chained
      device which hangs off an encoder. The drm driver using the bridge
      should provide the association between encoder and bridge. Once a
      bridge is associated with an encoder, it will participate in mode
      set, and dpms (via the enable/disable hooks).
      
      Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
      3d7036f8
  4. Aug 30, 2013
  5. Aug 02, 2013
  6. Jul 04, 2013
    • Rob Clark's avatar
      backport drm from 3.10-rc7 · 9a4ec6e7
      Rob Clark authored
      
      Sync to commit:
      
      commit 9e895ace
      Author:     Linus Torvalds <torvalds@linux-foundation.org>
      AuthorDate: Sat Jun 22 09:47:31 2013 -1000
      Commit:     Linus Torvalds <torvalds@linux-foundation.org>
      CommitDate: Sat Jun 22 09:47:31 2013 -1000
      
          Linux 3.10-rc7
      
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      9a4ec6e7
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