riscv: mm: dma-noncoherent: nonstandard cache operations support
Introduce support for nonstandard noncoherent systems in the RISC-V architecture. It enables function pointer support to handle cache management in such systems. This patch adds a new configuration option called "RISCV_NONSTANDARD_CACHE_OPS." This option is a boolean flag that depends on "RISCV_DMA_NONCOHERENT" and enables the function pointer support for cache management in nonstandard noncoherent systems. Signed-off-by:Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> # tyre-kicking on a d1 Reviewed-by:
Emil Renner Berthing <emil.renner.berthing@canonical.com> Tested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> # Link: https://lore.kernel.org/r/20230818135723.80612-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by:
Palmer Dabbelt <palmer@rivosinc.com>
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- arch/riscv/Kconfig 7 additions, 0 deletionsarch/riscv/Kconfig
- arch/riscv/include/asm/dma-noncoherent.h 28 additions, 0 deletionsarch/riscv/include/asm/dma-noncoherent.h
- arch/riscv/mm/dma-noncoherent.c 43 additions, 0 deletionsarch/riscv/mm/dma-noncoherent.c
- arch/riscv/mm/pmem.c 13 additions, 0 deletionsarch/riscv/mm/pmem.c
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