The armv8.2 architecture mandates presence of RAS extensions, which
enable on-chip error detection. Add a driver to enable that
functionality. This revision provides support for CPU Ln$, but can be
extended to other entities supported by the spec (such as SMMUs or
GIC).

The driver reuses the ACPI structs for both ACPI (where we can simply
copy the binary data) and DT (where we read some properties and
translate it into what ACPI would give us where it makes sense).

This is somewhat based on previous attempts by Qualcomm and Ampere
Computing.

The Arm Error Source Table provides information about the Error
Detection And Correction (EDAC) capabilities of the system.
Add a driver for handling it.

Add Cortex X1C and add/clarify various recent Qualcomm Kryo cores,
which almost exclusively mimic ARM IDs nowadays.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

# Conflicts:
#	tools/include/nolibc/stdio.h
#	tools/testing/selftests/nolibc/nolibc-test.c

# Conflicts:
#	rust/kernel/init.rs

Merge branch 'libnvdimm-for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm.git

Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace.git

Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git

Merge branch 'renesas-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git

# Conflicts:
#	drivers/net/virtio_net.c