drm/i915: Align GGTT sizes to a fence tile row
Ensure the view occupies the full tile row so that reads/writes into the VMA do not escape (via fenced detiling) into neighbouring objects - we will pad the object with scratch pages to satisfy the fence. This applies the lazy-tiling we employed on gen2/3 to gen4+. Signed-off-by:Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170109161613.11881-2-chris@chris-wilson.co.uk
Showing
- drivers/gpu/drm/i915/i915_drv.h 3 additions, 2 deletionsdrivers/gpu/drm/i915/i915_drv.h
- drivers/gpu/drm/i915/i915_gem.c 19 additions, 8 deletionsdrivers/gpu/drm/i915/i915_gem.c
- drivers/gpu/drm/i915/i915_gem_tiling.c 9 additions, 9 deletionsdrivers/gpu/drm/i915/i915_gem_tiling.c
- drivers/gpu/drm/i915/i915_vma.c 8 additions, 2 deletionsdrivers/gpu/drm/i915/i915_vma.c
Loading
Please register or sign in to comment