- Mar 14, 2025
-
-
Dan Carpenter authored
The devm_platform_get_and_ioremap_resource() function doesn't return NULL, it returns error pointers. Update the checking to match. Fixes: f78d206f ("Coresight: Add Coresight TMC Control Unit driver") Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by:
Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/dab039b9-d58a-41be-92f0-ff209cfabfe2@stanley.mountain
-
- Mar 12, 2025
-
-
Christophe JAILLET authored
'struct config_item_type' is not modified in this driver. These structures are only used with config_group_init_type_name() which takes a "const struct config_item_type *" as a 3rd argument or with struct config_group.cg_item.ci_type which is also a "const struct config_item_type *". Constifying this structure moves some data to a read-only section, so increase overall security, especially when the structure holds some function pointers. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 4904 1376 136 6416 1910 drivers/hwtracing/coresight/coresight-syscfg-configfs.o After: ===== text data bss dec hex filename 5264 1120 16 6400 1900 drivers/hwtracing/coresight/coresight-syscfg-configfs.o Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by:
James Clark <james.clark@linaro.org> Signed-off-by:
-
- Mar 11, 2025
-
-
James Clark authored
Previously the sink had to be specified, but now it auto selects one by default. Including a sink in the examples causes issues when copy pasting the command because it might not work if that sink isn't present. Remove the sink from all the basic examples and create a new section specifically about overriding the default one. Make the text a but more concise now that it's in the advanced section, and similarly for removing the old kernel advice. Signed-off-by:
Leo Yan <leo.yan@arm.com> Signed-off-by:
-
- Mar 10, 2025
-
-
Yeoreum Yun authored
In ultrasoc-smb drivers, smb_drv_data->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since smb__drv_data->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type smb_drv_data->spinlock in ultrasoc-smb drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by:
Yeoreum Yun <yeoreum.yun@arm.com> Signed-off-by:
-
Yeoreum Yun authored
In coresight-tmc drivers, tmc_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since tmc_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type tmc_drvdata->spinlock in coresight-tmc drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by:
Mike Leach <mike.leach@linaro.org> Signed-off-by:
-
Yeoreum Yun authored
In coresight-replicator drivers, replicator_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since replicator_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type replicator_drvdata->spinlock in coresight-replicator drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by:
-
Yeoreum Yun authored
In coresight-funnel drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since funnel_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type funnel_drvdata->spinlock in coresight-funnel drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by:
-
Yeoreum Yun authored
In coresight-etb10 drivers, etb_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etb_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etb_drvdata->spinlock in coresight-etb10 drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by:
-
Yeoreum Yun authored
In coresight-cti drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since cti_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type cti_drvdata->spinlock in coresight-cti drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by:
-
Yeoreum Yun authored
coresight_trace_id_map->lock can be acquired while coresight devices' drvdata_lock. But the drvdata_lock can be raw_spinlock_t (i.e) coresight-etm4x. To address this, change type of coresight_trace_id_map->lock to raw_spinlock_t Signed-off-by:
-
Yeoreum Yun authored
In coresight-etm4x drivers, etmv4_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etmv4_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etmv4_drvdata->spinlock in coresight-etm4x drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by:
-
Yeoreum Yun authored
coresight_device->cscfg_csdev_lock can be held during __schedule() by perf_event_task_sched_out()/in(). Since coresight->cscfg_csdev_lock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type of coresight_device->cscfg_csdev_lock from spinlock_t to raw_spinlock_t. Reviewed-by:
-
Jie Gan authored
The coresight_etm_get_trace_id function is a global function. The verification process for 'csdev' is required prior to its usage. Fixes: c367a89d ("Coresight: Add trace_id function to retrieving the trace ID") Signed-off-by:
Jie Gan <quic_jiegan@quicinc.com> Signed-off-by:
-
- Mar 04, 2025
-
-
Jie Gan authored
The Coresight TMC Control Unit hosts miscellaneous configuration registers which control various features related to TMC ETR sink. Based on the trace ID, which is programmed in the related CTCU ATID register of a specific ETR, trace data with that trace ID gets into the ETR buffer, while other trace data gets dropped. Enabling source device sets one bit of the ATID register based on source device's trace ID. Disabling source device resets the bit according to the source device's trace ID. Reviewed-by:
-
Jie Gan authored
Add binding file to specify how to define a Coresight TMC Control Unit device in device tree. It is responsible for controlling the data filter function based on the source device's Trace ID for TMC ETR device. The trace data with that Trace id can get into ETR's buffer while other trace data gets ignored. Reviewed-by:
Rob Herring (Arm) <robh@kernel.org> Signed-off-by:
-
Jie Gan authored
Modify following functions to accept the coresight_path. Devices in the path can read data from coresight_path if needed. - coresight_enable_path - coresight_disable_path - coresight_get_source - coresight_get_sink - coresight_enable_helpers - coresight_disable_helpers Signed-off-by:
-
Jie Gan authored
The source device can directly read the trace ID from the coresight_path which result in etm_read_alloc_trace_id and etm4_read_alloc_trace_id being deleted. Co-developed-by:
-
Jie Gan authored
The trace_id will be stored in coresight_path instead of being declared everywhere and allocated after building the path. Co-developed-by:
-
Jie Gan authored
Introduce a new strcuture, 'struct coresight_path', to store the data that utilized by the devices in the path. The coresight_path will be built/released by coresight_build_path/coresight_release_path functions. Signed-off-by:
-
James Clark authored
Use the new API, coresight_etm_get_trace_id, to read the traceid of the ETM device when call traceid_show via sysfs node. Signed-off-by:
-
Jie Gan authored
Add 'trace_id' function pointer in coresight_ops. It's responsible for retrieving the device's trace ID. Co-developed-by:
-
Jie Gan authored
Add support for new APB clock-name. If the function fails to obtain the clock with the name "apb_pclk", it will attempt to acquire the clock with the name "apb". Reviewed-by:
-
- Feb 26, 2025
-
-
Krzysztof authoredBinding listed variable number of IO addresses without defining them, however example DTS code, all in-tree DTS and Linux kernel driver mention only one address space, so drop the second to make binding precise and correctly describe the hardware. Fixes: 6c781a35 ("dt-bindings: arm: Add CoreSight TPDM hardware") Cc: stable@vger.kernel.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
-
Krzysztof authored
Binding listed variable number of IO addresses without defining them, however example DTS code, all in-tree DTS and Linux kernel driver mention only one address space, so drop the second to make binding precise and correctly describe the hardware. Fixes: a8fbe144 ("dt-bindings: arm: Adds CoreSight TPDA hardware definitions") Cc: stable@vger.kernel.org Signed-off-by:
-
Tao Zhang authored
Add the sysfs file to set/get the enablement of the lane. For MCMB configurations, the field "E_LN" in CMB_CR register is the individual lane enables. MCMB lane N is enabled for trace generation when M_CMB_CR.E=1 and M_CMB_CR.E_LN[N]=1. For lanes that are not implemented on a given MCMB configuration, the corresponding bits of this field read as 0 and ignore writes. Signed-off-by:
Tao Zhang <quic_taozha@quicinc.com> Signed-off-by:
Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by:
-
Tao Zhang authored
TPDM MCMB subunits supports up to 8 lanes CMB. For MCMB configurations, the field "XTRIG_LNSEL" in CMB_CR register selects which lane participates in the output pattern mach cross trigger mechanism governed by the M_CMB_DXPR and M_CMB_XPMR regisers. Signed-off-by:
-
Mao Jinlong authored
MCMB (Multi-lane CMB) is a special form of CMB dataset type. MCMB subunit TPDM has the same number and usage of registers as CMB subunit TPDM. MCMB subunit can be enabled for data collection by writing 1 to the first bit of CMB_CR register. The difference is that MCMB subunit TPDM needs to select the lane and enable it in using it. Signed-off-by:
-
Yuanfang Zhang authored
As recommended by section 4.3.7 ("Synchronization when using system instructions to progrom the trace unit") of ARM IHI 0064H.b, the self-hosted trace analyzer must perform a Context synchronization event between writing to the TRCPRGCTLR and reading the TRCSTATR. Additionally, add an ISB between the each read of TRCSTATR on coresight_timeout() when using system instructions to program the trace unit. Fixes: 1ab3bb9d ("coresight: etm4x: Add necessary synchronization for sysreg access") Signed-off-by:Yuanfang Zhang <quic_yuanfang@quicinc.com> Signed-off-by:
-
Wolfram Sang authored
The header clearly states that it does not want to be included directly, only via '<linux/(platform_)?device.h>'. Which is already present, so delete the superfluous include. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by:
-
- Feb 24, 2025
-
-
Krzysztof authored
'struct amba_id' table is not modified so can be changed to const for more safety. Signed-off-by:
-
Krzysztof authored
'struct amba_id' table is not modified so can be changed to const for more safety. Signed-off-by:
-
Krzysztof authored
'struct amba_id' table is not modified so can be changed to const for more safety. Signed-off-by:
-
- Feb 21, 2025
-
-
Linu Cherian authored
Add documentation on using coresight during panic and watchdog. Signed-off-by:
Linu Cherian <lcherian@marvell.com> Signed-off-by:
-
Linu Cherian authored
Add a preloaded configuration for generating external trigger on address match. This can be used by CTI and ETR blocks to stop trace capture on kernel panic. Kernel address for "panic" function is used as the default trigger address. This new configuration is available as, /sys/kernel/config/cs-syscfg/configurations/panicstop Signed-off-by:
James Clark <james.clark@arm.com> Signed-off-by:
-
Linu Cherian authored
Configure TMC ETR and ETF to flush and stop trace capture on FlIn event based on sysfs attribute, /sys/bus/coresight/devices/tmc_etXn/stop_on_flush. Signed-off-by:
-
Linu Cherian authored
* Add support for reading crashdata using special device files. The special device files /dev/crash_tmc_xxx would be available for read file operation only when the crash data is valid. * User can read the crash data as below For example, for reading crash data from tmc_etf sink #dd if=/dev/crash_tmc_etfXX of=~/cstrace.bin Signed-off-by:
Anil Kumar Reddy <areddy3@marvell.com> Signed-off-by:
Tanmay Jagdale <tanmay@marvell.com> Signed-off-by:
-
Linu Cherian authored
- Get reserved region from device tree node for metadata - Define metadata format for TMC - Add TMC ETR panic sync handler that syncs register snapshot to metadata region - Add TMC ETF panic sync handler that syncs register snapshot to metadata region and internal SRAM to reserved trace buffer region. Signed-off-by:
-
Linu Cherian authored
Panic callback handlers allows coresight device drivers to sync relevant trace data and trace metadata to reserved memory regions so that they can be retrieved later in the subsequent boot or in the crashdump kernel. Signed-off-by:
-
Linu Cherian authored
Add support to use reserved memory for coresight ETR trace buffer. Introduce a new ETR buffer mode called ETR_MODE_RESRV, which becomes available when ETR device tree node is supplied with a valid reserved memory region. ETR_MODE_RESRV can be selected only by explicit user request. $ echo resrv >/sys/bus/coresight/devices/tmc_etr<N>/buf_mode_preferred Signed-off-by:
-
Linu Cherian authored
memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Reviewed-by:
-
