Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2074832



commit 9b026073
Author: Jim Mattson <jmattson@google.com>
Date:   Sat Feb 26 15:41:31 2022 -0800

    KVM: x86/svm: Clear reserved bits written to PerfEvtSeln MSRs

    AMD EPYC CPUs never raise a #GP for a WRMSR to a PerfEvtSeln MSR. Some
    reserved bits are cleared, and some are not. Specifically, on
    Zen3/Milan, bits 19 and 42 are not cleared.

    When emulating such a WRMSR, KVM should not synthesize a #GP,
    regardless of which bits are set. However, undocumented bits should
    not be passed through to the hardware MSR. So, rather than checking
    for reserved bits and synthesizing a #GP, just clear the reserved
    bits.

    This may seem pedantic, but since KVM currently does not support the
    "Host/Guest Only" bits (41:40), it is necessary to clear these bits
    rather than synthesizing #GP, because some popular guests (e.g Linux)
    will set the "Host Only" bit even on CPUs that don't support
    EFER.SVME, and they don't expect a #GP.

    For example,

    root@Ubuntu1804:~# perf stat -e r26 -a sleep 1

     Performance counter stats for 'system wide':

                     0      r26

           1.001070977 seconds time elapsed

    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379957] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write 0x0000020000130026) at rIP: 0xffffffff9b276a28 (native_write_msr+0x8/0x30)
    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379958] Call Trace:
    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379963]  amd_pmu_disable_event+0x27/0x90

    Fixes: ca724305 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM")
Reported-by: Lotus Fenn <lotusf@google.com>
Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Like Xu <likexu@tencent.com>
Reviewed-by: David Dunn <daviddunn@google.com>
    Message-Id: <20220226234131.2167175-1-jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>