Decrement and check the ref count of map inside the lock. Otherwise,
two threads may free the same map.

Change-Id: If9153f32a0ef126692185593e44df4778a7ef9ba
Acked-by: Abhishek Singh <abhishes@qti.qualcomm.com>
Signed-off-by: Santosh Sakore <quic_ssakore@quicinc.com>

Merge "Revert "arm64: defconfig: neo: Enable hibernation support for KGSL"" into kernel.lnx.5.10.r2-rel

This reverts commit 676a0dc0.

Signed-off-by: Niranjan Reddy Dumbala <quic_dnreddy@quicinc.com>
Change-Id: Id7d829c0919e6278db2a4cadc28f26c7f6fc52b1

This reverts commit 6bd80a42.

Change-Id: I24a08e50214da0c740bdb79c8e10df21a9d5ff10
Signed-off-by: Niranjan Reddy Dumbala <quic_dnreddy@quicinc.com>

Currently, remote heap maps get added to the global list before the
fastrpc_internal_mmap function completes the mapping. Meanwhile, the
fastrpc_internal_munmap function accesses the map, starts unmapping, and
frees the map before the fastrpc_internal_mmap function completes,
resulting in a use-after-free (UAF) issue. Add the map to the list after
the fastrpc_internal_mmap function completes the mapping.

Change-Id: If285c207e2d8c28ff018b2c5b330ee4d5fe11bdb
Acked-by: Abhishek Singh <abhishes@qti.qualcomm.com>
Signed-off-by: Santosh Sakore <quic_ssakore@quicinc.com>
(cherry picked from commit eeea9823)

The bind operation clean up code is duplicated in the worker and the
destroy functions. Instead of doing the same steps at both places, simplify
the code and do the clean up operations only in the destroy function.

Change-Id: I14c9e4f31b40cf6c8062c4427461da3db7d2c097
Signed-off-by: Lynus Vaz <quic_lvaz@quicinc.com>
Signed-off-by: Sanjay Yadav <quic_sanjyada@quicinc.com>

Bind operations require the referenced mem_entry objects to be currently
pinned in memory. To ensure this, reclaim the process to pinned state to
bring all its mem_entry objects into memory when creating the bind object.

Change-Id: I5b46891004d42bed6a0e3a0c66bcdcd25ad52321
Signed-off-by: Lynus Vaz <quic_lvaz@quicinc.com>
Signed-off-by: Sanjay Yadav <quic_sanjyada@quicinc.com>

Change-Id: I6286aef118b79701b7b7b5517b9d90731b9fc91d

Some tlmm pin-control drivers do not define tiles, add support
to restore pin control states for such chips by enhancing the
freeze and restore callbacks.

Change-Id: I868073cac0ed5b9ef4d0f5058aeefcb636df9a09
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>
(cherry picked from commit 932f5628b8c1362c837a495dfb795c0468e87ac3)

Add support for hibernation callbacks for pinctrl-msm implement
freeze and restore callbacks.

Change-Id: I7aa9c588fad63a0de66f6e9b1f8df65c7dee8016
Signed-off-by: Venkatakrishnaiah Pari <quic_vpari@quicinc.com>
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>

Change-Id: Ie9a4ed55f650fb12155f0a4bc84ef87caa7ad538
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>

Merge "iommu: arm-smmu: Destroy secure pools before entering hibernation" into kernel.lnx.5.10.r2-rel

Merge "iommu: arm-smmu: Destroy secure page table pools during hibernation" into kernel.lnx.5.10.r2-rel

* changes:
  iommu: arm-smmu: Add support for hibernation
  mailbox: msm_qmp: Handle first interrupt after hibernate exit

Merge "mailbox: msm_qmp: Skip negotiation during restore for qmp shim layer" into kernel.lnx.5.10.r2-rel

* changes:
  usb: dwc3-msm: Queue sm_work from pm_resume if syscore is set
  drivers: soc: qcom: Add support for CDSP hibernation

* changes:
  clk: qcom: Add pm ops for gdsc
  clk: qcom: clk-pm: Update the sequence in register_qcom_clks_pm API
  serial: qcom_geni_serial: Add support for hibernation feature
  irqchip/gic-v3: Re-init GIC hardware upon hibernation restore
  Update ABI for S2D
  dma-heaps: Add hibernation callbacks to secure heaps

* changes:
  clk: qcom: sm8150: Register CCs with clk pm for sm8150
  clk: qcom: branch: Add save context callback to branch ops

UART register settings will be lost during hibernation.
Update the logic such that port setup happens for
both console uart and hs uart during restore and register
settings are done accordingly.

Change-Id: Ia8b3d3610b4216d0f1fa456423fc31568d8c2271
Signed-off-by: Rama Krishna Phani A <rphani@codeaurora.org>
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>

Some page table allocators fail to assign the base addresses of S2
context banks to their appropriate VMIDs, as addresses are sometimes
fetched from local pools managed by the allocators. This can cause
translation failures if the device enters and exits hibernation.

Destroy the secure pools of each SMMU domain with secure context banks
before entering hibernation. Ensure that newly allocated page table base
addresses are appropriately hyp-assigned after exiting hibernation.

Change-Id: I0e22f358c108b7f8ffa5ff8ef383813a0f2bb3ea
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>

Destroy page tables for secure context banks during hibernation
freeze and allocate new page tables during restore operation.

Change-Id: I1498df18d8555b69bb159fc14205b5c905b57bdc
Signed-off-by: Vivek Kumar <quic_vivekuma@quicinc.com>
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
[quic_jasksing@quicinc.com: Rebase on msm-5.10]
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>

Add support for hibernation use case with hibernation
freeze_late,thaw_early and restore_early callbacks.

Change-Id: I6074029bb778954d00b2a6ad136874a6846b4b10
Signed-off-by: Venkatakrishnaiah Pari <quic_vpari@quicinc.com>
[quic_jasksing@quicinc.com: Rebase on msm-5.10]
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>

QMP comes very early after hibernate exit, so there is
a chance to miss the interrupt from remote qmp before apps
qmp driver restore. In case of hibernate, early interrupt corrupts
the QMP state machine and endup with invalid states.

This corruption can be avoided by ignoring the first interrupt
after hibernate exit and re-establish the connection in restore
callback.

Change-Id: I06dccfe11ff8d4a85cfac4c3ca45f52275447a45
Signed-off-by: Sivaji Boddupilli <quic_boddupil@quicinc.com>

Skip negotiation if device has shim layer for remote subsystem
after hibernate restore.

Change-Id: I9802b2b77ac9cb7f16da2d1407ea9b114bdcb807
Signed-off-by: Sivaji Boddupilli <quic_boddupil@quicinc.com>

Add support for extcon notification for plugin and plugout
events of usb, depending on VBUS_GD bit in hibernation exit.

Change-Id: I2481a9ee9bc840b38aedea1c572df4ee9700580c
Signed-off-by: Rakesh Kota <quic_kotarake@quicinc.com>

Consider a scenario where we have performed EUD spoof detach
successfully and system got suspended. Now when we perform
spoof connect, resume_work bails out from queueing sm_work
since pm_suspended bit is set, and dwc3_msm_pm_resume() gets
called which bails out again since in_hostmode flag is false.
And the expectation is to let dwc3_core_complete() kickstart
the state machine. But complete callback never gets called
since DWC3's power.syscore flag is set.

This was introduced by commit f4a82a39ee14 ("usb: dwc3:
dwc3-msm-core: Mark dwc3 core device as syscore device").
Fix this by explicitly queueing otg_sm_work from pm_resume
if the power.syscore flag is set.

Change-Id: Iab541a990c05f037037b47fbde66e23ec92faba1
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>

Add hibernate support for CDSP subsystem in power state driver.

Change-Id: I5bfd9b842cf1e3ebd79e5fb102e2bc2feb6b114d
Signed-off-by: Niranjan Reddy Dumbala <quic_dnreddy@quicinc.com>

ICC driver reprograms the QoS values in hibernation restore
path. Neo target uses kernel based hibernate implementation
which loads the first stage modules followed by hibernation
image restore. As QoS gets programmed during first stage
loading, reprogramming of QoS is not required. Hence pm_ops
are not implemented.
keepalive_early flag is added for display related BCMs to
mimic the turbo vote placed on display DRV from UEFI.

Change-Id: I1da6ec189fd9939b782c9f01beffae73d2f4d064
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>

Register CC's with clock pm framework for hibernation usecase
on NEO platform.

Change-Id: I4670f6e6f5e1b07327247989e0260a48fa3d1d04
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>

Add pm ops for gdsc during DS/Hibernation. This is to support the gdscs
which update the clk_dis_wait value in registration and need hw_support
trigger mode.

Change-Id: I3a52afc28923d911c281c06aa34815fb0a7c4d8a
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>

Update the sequence of the code execution in the register_qcom_clks_pm
API so that the runtime pm ops are registered before the
pm_runtime_get_sync API which internally needs to call the ops.

Change-Id: I94efdd9554092a0d7c30f134823b23881059475e
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>

Added changes to support the hibernation feature for serial UART.
Added support for freeze, restore and thaw callbacks to put the
device into hibernation.

Change-Id: I618a6df0efc37756bd9571c667b159f83cec2a5f
Signed-off-by: Venkatakrishnaiah Pari <quic_vpari@quicinc.com>
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
Signed-off-by: Auditya Bhattaram <quic_audityab@quicinc.com>

Code added in this patch takes backup of different set of
registers during hibernation suspend. On receiving hibernation
restore callback, it restores register values from backup. This
ensures state of hardware to be same just before hibernation and
after restore.

Change-Id: I36cfce8901ccfd82562764d8f6614f8760273248
Signed-off-by: Omkar Savagaonkar <omkars@codeaurora.org>
Signed-off-by: Arun KS <arunks@codeaurora.org>
Signed-off-by: Vivek Kumar <quic_vivekuma@quicinc.com>
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
Signed-off-by: Auditya Bhattaram <quic_audityab@quicinc.com>