drivers/amlogic/media/enhancement/amvecm/amve.c

@@ -2162,3 +2162,136 @@ int dv_pq_ctl(enum dv_pq_ctl_e ctl)
 	return 0;
 }
 EXPORT_SYMBOL(dv_pq_ctl);
+
+int mtx_mul_mtx(int (*mtx_a)[3], int (*mtx_b)[3], int (*mtx_out)[3])
+{
+	int i, j, k;
+
+	for (i = 0; i < 3; i++) {
+		for (j = 0; j < 3; j++) {
+			mtx_out[i][j] = 0;
+			for (k = 0; k < 3; k++)
+				mtx_out[i][j] += mtx_a[i][k] * mtx_b[k][j];
+		}
+	}
+
+	for (i = 0; i < 3; i++) {
+		for (j = 0; j < 3; j++)
+			mtx_out[i][j] = (mtx_out[i][j] + (1 << 9)) >> 10;
+	}
+
+	return 0;
+}
+
+int mtx_multi(int *rgb, int (*mtx_out)[3])
+{
+	int i, j;
+	int mtx_rgb[3][3] = {{0},{0}};
+	int mtx_in[3][3] = {{0},{0}};
+	int mtx_rgbto709l[3][3] = {
+		{187, 629, 63},
+		{-103, -346, 450},
+		{450, -409, -41},
+	};
+	int mtx_709ltorgb[3][3] = {
+		{1192, 0, 1836},
+		{1192, -218, -547},
+		{1192, 2166, 0},
+	};
+
+	mtx_in[0][0] = rgb[0];
+	mtx_in[1][1] = rgb[1];
+	mtx_in[2][2] = rgb[2];
+
+	if (mtx_in[0][0] == 0x400 &&
+		mtx_in[1][1] == 0x400 &&
+		mtx_in[2][2] == 0x400) {
+		for (i = 0; i < 3; i++) {
+			for (j = 0; j < 3; j++) {
+				if (i == j)
+					mtx_out[i][j] = 0x400;
+				else
+					mtx_out[i][j] = 0;
+			}
+		}
+
+	} else {
+		mtx_mul_mtx(mtx_in, mtx_709ltorgb, mtx_rgb);
+		mtx_mul_mtx(mtx_rgbto709l, mtx_rgb, mtx_out);
+	}
+
+	for (i = 0; i < 3; i++) {
+		for (j = 0; j < 3; j++)
+			pr_amve_dbg("mtx_out[%d][%d] = 0x%x\n",
+			i, j, mtx_out[i][j]);
+	}
+	return 0;
+}
+
+void eye_proc(int *rgb, int mtx_on)
+{
+	unsigned int matrix_coef00_01 = 0;
+	unsigned int matrix_coef02_10 = 0;
+	unsigned int matrix_coef11_12 = 0;
+	unsigned int matrix_coef20_21 = 0;
+	unsigned int matrix_coef22 = 0;
+	unsigned int matrix_coef13_14 = 0;
+	unsigned int matrix_coef23_24 = 0;
+	unsigned int matrix_coef15_25 = 0;
+	unsigned int matrix_clip = 0;
+	unsigned int matrix_offset0_1 = 0;
+	unsigned int matrix_offset2 = 0;
+	unsigned int matrix_pre_offset0_1 = 0;
+	unsigned int matrix_pre_offset2 = 0;
+	unsigned int matrix_en_ctrl = 0;
+	int mtx_out[3][3] = {{0},{0}};
+	int pre_offset[3] = {
+		-64, -512, -512
+	};
+
+	int offset[3] = {
+		64, 512, 512
+	};
+	struct vinfo_s *vinfo = get_current_vinfo();
+
+	if (vinfo->mode == VMODE_LCD)
+		return;
+
+	matrix_coef00_01 = VPP_POST2_MATRIX_COEF00_01;
+	matrix_coef02_10 = VPP_POST2_MATRIX_COEF02_10;
+	matrix_coef11_12 = VPP_POST2_MATRIX_COEF11_12;
+	matrix_coef20_21 = VPP_POST2_MATRIX_COEF20_21;
+	matrix_coef22 = VPP_POST2_MATRIX_COEF22;
+	matrix_coef13_14 = VPP_POST2_MATRIX_COEF13_14;
+	matrix_coef23_24 = VPP_POST2_MATRIX_COEF23_24;
+	matrix_coef15_25 = VPP_POST2_MATRIX_COEF15_25;
+	matrix_clip = VPP_POST2_MATRIX_CLIP;
+	matrix_offset0_1 = VPP_POST2_MATRIX_OFFSET0_1;
+	matrix_offset2 = VPP_POST2_MATRIX_OFFSET2;
+	matrix_pre_offset0_1 = VPP_POST2_MATRIX_PRE_OFFSET0_1;
+	matrix_pre_offset2 = VPP_POST2_MATRIX_PRE_OFFSET2;
+	matrix_en_ctrl = VPP_POST2_MATRIX_EN_CTRL;
+
+	VSYNC_WR_MPEG_REG_BITS(VPP_POST2_MATRIX_EN_CTRL, mtx_on, 0, 1);
+
+	if (!mtx_on)
+		return;
+
+	mtx_multi(rgb, mtx_out);
+	VSYNC_WR_MPEG_REG(matrix_coef00_01,
+		((mtx_out[0][0] & 0x1fff) << 16) | (mtx_out[0][1] & 0x1fff));
+	VSYNC_WR_MPEG_REG(matrix_coef02_10,
+		((mtx_out[0][2] & 0x1fff) << 16) | (mtx_out[1][0] & 0x1fff));
+	VSYNC_WR_MPEG_REG(matrix_coef11_12,
+		((mtx_out[1][1] & 0x1fff) << 16) | (mtx_out[1][2] & 0x1fff));
+	VSYNC_WR_MPEG_REG(matrix_coef20_21,
+		((mtx_out[2][0] & 0x1fff) << 16) | (mtx_out[2][1] & 0x1fff));
+	VSYNC_WR_MPEG_REG(matrix_coef22, (mtx_out[2][2] & 0x1fff));
+	VSYNC_WR_MPEG_REG(matrix_offset0_1,
+		((offset[0] & 0x7ff) << 16) | (offset[1] & 0x7ff));
+	VSYNC_WR_MPEG_REG(matrix_offset2, (offset[2] & 0x7ff));
+	VSYNC_WR_MPEG_REG(matrix_pre_offset0_1,
+		((pre_offset[0] & 0x7ff) << 16) | (pre_offset[1] & 0x7ff));
+	VSYNC_WR_MPEG_REG(matrix_pre_offset2, (pre_offset[2] & 0x7ff));
+}
+

drivers/amlogic/media/enhancement/amvecm/amve.h

@@ -207,5 +207,6 @@ extern void set_gamma_regs(int en, int sel);
 void amvecm_wb_enable(int enable);
 int vpp_pq_ctrl_config(struct pq_ctrl_s pq_cfg);
 unsigned int skip_pq_ctrl_load(struct am_reg_s *p);
+void eye_proc(int *rgb, int mtx_on);
 #endif
 

drivers/amlogic/media/enhancement/amvecm/amvecm.c

@@ -227,6 +227,10 @@ unsigned int vecm_latch_flag;
 module_param(vecm_latch_flag, uint, 0664);
 MODULE_PARM_DESC(vecm_latch_flag, "\n vecm_latch_flag\n");
 
+unsigned int vecm_latch_flag2;
+module_param(vecm_latch_flag2, uint, 0664);
+MODULE_PARM_DESC(vecm_latch_flag2, "\n vecm_latch_flag2\n");
+
 unsigned int vpp_demo_latch_flag;
 module_param(vpp_demo_latch_flag, uint, 0664);
 MODULE_PARM_DESC(vpp_demo_latch_flag, "\n vpp_demo_latch_flag\n");
@@ -301,6 +305,7 @@ static int wb_init_bypass_coef[24] = {
 	0, 0, 0, /* offset */
 	0, 0, 0  /* mode, right_shift, clip_en */
 };
+struct eye_protect_s eye_protect;
 
 /* vpp brightness/contrast/saturation/hue */
 static int __init amvecm_load_pq_val(char *str)
@@ -1096,6 +1101,14 @@ void amvecm_dejaggy_patch(struct vframe_s *vf)
 	}
 }
 
+void eye_prot_update(struct eye_protect_s *eye_prot)
+{
+	if (vecm_latch_flag2 & VPP_EYE_PROTECT_UPDATE) {
+		eye_proc(eye_prot->rgb, eye_prot->en);
+		vecm_latch_flag2 &= ~VPP_EYE_PROTECT_UPDATE;
+	}
+}
+
 void amvecm_video_latch(void)
 {
 	pc_mode_process();
@@ -1117,6 +1130,7 @@ void amvecm_video_latch(void)
 
 	/* ioc vadj1/2 switch */
 	amvecm_vadj_latch_process();
+	eye_prot_update(&eye_protect);
 }
 
 static void amvecm_overscan_process(
@@ -1526,6 +1540,7 @@ static long amvecm_ioctl(struct file *file,
 	struct vpp_pq_ctrl_s pq_ctrl;
 	enum meson_cpu_ver_e cpu_ver;
 	struct cms_data_s data;
+	struct eye_protect_s *eye_prot = NULL;
 
 	if (debug_amvecm & 2)
 		pr_info("[amvecm..] %s: cmd_nr = 0x%x\n",
@@ -2023,6 +2038,26 @@ static long amvecm_ioctl(struct file *file,
 			pq_user_latch_flag |= PQ_USER_CMS_CURVE_HUE_HS;
 		}
 		break;
+	case AMVECM_IOC_S_EYE_PROT:
+		mem_size = sizeof(struct eye_protect_s);
+		eye_prot = kmalloc(mem_size, GFP_KERNEL);
+		if (!eye_prot) {
+			pr_amvecm_dbg("eye_protect malloc fail\n");
+			ret = -ENOMEM;
+			break;
+		}
+		if (copy_from_user(eye_prot, (void __user *)arg,
+				   sizeof(struct eye_protect_s))) {
+			ret = -EFAULT;
+			pr_amvecm_dbg("eye_protect struct cp from usr failed\n");
+		} else {
+			pr_amvecm_dbg("eye_protect struct cp from usr success\n");
+			eye_protect.en = eye_prot->en;
+			memcpy(eye_protect.rgb,
+				eye_prot->rgb, 3 * sizeof(int));
+			vecm_latch_flag2 |= VPP_EYE_PROTECT_UPDATE;
+		}
+		break;
 	default:
 		ret = -EINVAL;
 		break;
@@ -2031,6 +2066,7 @@ static long amvecm_ioctl(struct file *file,
 		kfree(vpp_pq_load_table);
 
 	kfree(hdr_tm);
+	kfree(eye_prot);
 	return ret;
 }
 #ifdef CONFIG_COMPAT

drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c

@@ -1111,6 +1111,8 @@ static void set_hdmitx_fe_clk(struct hdmitx_dev *hdev)
 	switch (vic) {
 	case HDMI_720x480i60_16x9:
 	case HDMI_720x576i50_16x9:
+	case HDMI_720x480i60_4x3:
+	case HDMI_720x576i50_4x3:
 		tmp = (hd_read_reg(vid_clk_div) >> 28) & 0xf;
 		break;
 	default:

include/linux/amlogic/media/amvecm/amvecm.h

@@ -66,6 +66,7 @@
 #define VPP_VADJ1_BLMINUS_EN        (1 << 1)
 #define VPP_VADJ1_EN                (1 << 0)
 
+#define VPP_EYE_PROTECT_UPDATE      BIT(13)
 #define VPP_DEMO_DNLP_DIS           (1 << 3)
 #define VPP_DEMO_DNLP_EN            (1 << 2)
 #define VPP_DEMO_CM_DIS             (1 << 1)
@@ -275,6 +276,13 @@ enum meson_cpu_ver_e {
 /*cpu ver ioc*/
 #define AMVECM_IOC_S_MESON_CPU_VER _IOW(_VE_CM, 0x6b, enum meson_cpu_ver_e)
 
+struct eye_protect_s {
+	int en;
+	int rgb[3];
+};
+
+#define AMVECM_IOC_S_EYE_PROT   _IOW(_VE_CM, 0x78, struct eye_protect_s)
+
 struct am_vdj_mode_s {
 	int flag;
 	int brightness;