- Sep 25, 2024
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Abel Vesa authoredThis config is mostly based on Johan's defconfig from his github tree. Not-Signed-off-by:Abel Vesa <abel.vesa@linaro.org>
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Abel Vesa authored
The Thinkpad T14s seems to have the third PTN2333 redriver populated, which, if the same design is the same as on QCP, it belongs to the USB2 controller. On QCP this is connected to the USB5 port, but on T14s, without schematics we don't know yet what it is connected to. Add the redriver and enable the eUSB2 PHY. Not-signed-off-by: -
Abel Vesa authored
The Qualcomm X1E QCP has the third PTN2333 redriver it belongs to the USB2 controller, which is routed to the 5th USB Type-A port. Add the redriver and enable the eUSB2 PHY to allow the port to work. Untested! Not-signed-off-by: -
Abel Vesa authored
The Qualcomm X1E QCP has 2 USB-A ports that are connected to the USB multiport controller via 2 eUSB2 redriver and PHY chains for high-speed support and 2 QMP PHYs for superspeed support. Enable the MP controller and all related PHYs and redrivers in order to make those 2 USB-A ports to work. Signed-off-by: -
Abel Vesa authored
The Thinkpad T14s has 2 USB-A ports that are connected to the USB multiport controller via 2 eUSB2 redriver and PHY chains for high-speed support and 2 QMP PHYs for superspeed support. Enable the MP controller and all related PHYs and redrivers in order to make those 2 USB-A ports to work. Signed-off-by: -
Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
Allowing these GDSCs to collapse makes the QMP combo PHYs lose their configuration on machine suspend. Currently, the QMP combo PHY driver doesn't reinitialise the HW on resume. Under such conditions, the USB SuperSpeed support is broken. To avoid this, mark the pwrsts flags with RET_ON. This has been already done for USB 0 and 1 SS PHY GDSCs, Do this USB MP SS1 PHY GDSC config. The USB MP SS1 PHY GDSC already has it. Fixes: 161b7c40 ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") Signed-off-by:
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The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. The reset state enables autonegotiation of the PHY role and of the data rate, so no additional programming is required. Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Tested-by:
Konrad Dybcio <konradybcio@kernel.org> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240830-nxp-ptn3222-v2-2-4c6d8535cf6c@linaro.org
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The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Signed-off-by:
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Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
The Lenovo Thinkpad T14s has only 2 USB Type-C ports, both of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly add the voltage regulators needed by each retimer and then enable DP 0 and 1. Signed-off-by: -
Abel Vesa authored
The Lenovo Yoga Slim 7x laptop has 3 USB Type-C ports, and just like the CRD, all of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly, add the voltage regulators needed by each retimer and then enable all 3 remaining DPUs. Signed-off-by: -
Abel Vesa authored
The Qualcomm Snapdragon X Elite CRD board has 3 USB Type-C ports, all of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly, add the voltage regulators needed by each retimer and then enable all 3 remaining DPUs. Signed-off-by: -
Abel Vesa authored
The Parade PS8830 is a Type-C muti-protocol retimer controlled over I2C. It provides both altmode and orientation handling. Add a driver with support for the following modes: - DP 4lanes - USB3 - DP 2lanes + USB3 Signed-off-by:
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- Sep 24, 2024
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Abel Vesa authored
Signed-off-by: -
The distro packages (deb-pkg, pacman-pkg, rpm-pkg) are generated using the compressed kernel image, which means that the kernel once installed can not be booted with systemd-boot. This differs from the packages generated by the distros themselves, which uses the uncompressed image. Expand the newly introduced CONFIG_COMPRESSED_INSTALL option to allow selection of which version of the kernel image should be packaged into the distro packages. Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
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Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
The Lenovo Yoga Slim 7x laptop has 3 USB Type-C ports, and just like the CRD, all of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly, add the voltage regulators needed by each retimer and then enable all 3 remaining DPUs. Signed-off-by: -
Abel Vesa authored
The orientation-switch is already set in the x1e80100 SoC dtsi. Signed-off-by: -
Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
Fixes: ee3f0739 ("clk: qcom: Add dispcc clock driver for x1e80100") Signed-off-by:
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Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
Signed-off-by: -
Abel Vesa authored
Add node uart14 for x1e80100. Co-developed-by:
Zijun Hu <quic_zijuhu@quicinc.com> Signed-off-by:
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As part of bus config before the bank switch happens, setup soundwire clk switching signal to indicate clk switch in frequency synchronously to codec digital core. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: -
Check for SPF readiness in prm driver probe to avoid race conditions during ADSP pil loading. This patch is to avoid, sending requests to ADSP before it's PD's is up and ready. Signed-off-by:
Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Tested-by:
Ratna Deepthi Kudaravalli <rkudarav@qti.qualcomm.com> (cherry picked from commit b8d605823adfcb71fe3b3fa110dcf2fc2f53cb21) Signed-off-by:
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Signed-off-by:
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DSP expects the buffers to be aligned to 64bytes, so fix the current sizes where there is a possiblity of getting an unaligned buffers. Signed-off-by:
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For some reason on wsa883x we see Port Collision during bank swith, adding a delay seems provide a good workaround for this. Needs more investigation. Signed-off-by:
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Registering controller even before pm runtime is enabled will result in pm runtime underflow warnings. Fix this by properly moving the runtime pm enable before registering controller. Fixes: 74e79da9 ("soundwire: qcom: add runtime pm support") Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> (cherry picked from commit 7578d5a6e7e7f0e2457f330c5c10c5c0b09c900d) Signed-off-by:
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If the thermal core tries to update the temperature from an uninitialized power supply, it will swawn the following warning: thermal thermal_zoneXX: failed to read out thermal zone (-19) But reading from an uninitialized power supply should not be considered as a fatal error, but the thermal core expects the -EAGAIN error to be returned in this particular case. So convert -ENODEV as -EAGAIN to express the fact that reading temperature from an uninitialized power supply shouldn't be a fatal error, but should indicate to the thermal zone it should retry later. It notably removes such messages on Qualcomm platforms using the qcom_battmgr driver spawning warnings until the aDSP firmware gets up and the battery manager reports valid data. Link: https://lore.kernel.org/all/2ed4c630-204a-4f80-a37f-f2ca838eb455@linaro.org/ Fixes: 5bc28b93 ("power_supply: power_supply_read_temp only if use_cnt > 0") Fixes: 3be330bf ("power_supply: Register battery as a thermal zone") Signed-off-by:
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New GPUs still use the lower 2 bytes of the chip id (in whatever form it comes) to signify silicon revision. Drop the warning that makes it sound as if that was unintended. Fixes: 90b593ce ("drm/msm/adreno: Switch to chip-id for identifying GPU") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org>
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Abel Vesa authored
Add support for the SHP 1505 panel. Signed-off-by: -
Abel Vesa authored
Enable the CPUCP mailbox controller driver as built-in. Needed by the new Qualcomm X1E80100 platform. Signed-off-by: -
Abel Vesa authored
Document bindings for the Parade PS8830 Type-C retimer. This retimer is currently found on all boards featuring Qualcomm Snapdragon X Elite SoCs and it is needed to provide altmode muxing between DP and USB. Signed-off-by:
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The DMA implementation is broken and currently relies on having these bogus calls to stop and restart RX in set_termios(). Add them back temporarily to avoid breaking Bluetooth. Signed-off-by: -
Add a custom trimmed configuration that can be used to test SC8280XP and X1E80100 support including the Lenovo ThinkPad X13s, sc8280xp-crd, sa8295p-adp and x1e80100-crd. Make sure the initramfs includes any modules required to boot, for example: nvme phy_qcom_qmp_pcie pcie_qcom for the X13s, nvme tcsrcc_x1e80100 phy_qcom_qmp_pcie pcie_qcom for the x1e80100-crd, and phy_qcom_qmp_ufs ufs_qcom for the sc8280xp-crd with rootfs on UFS. For keyboard input and (more than 30 seconds of) display in initramfs, make sure to also include: i2c_hid_of i2c_qcom_geni for keyboard, and leds_qcom_lpg pwm_bl qrtr pmic_glink_altmode gpio_sbu_mux phy_qcom_qmp_combo gpucc_sc8280xp dispcc_sc8280xp phy_qcom_edp panel_edp msm for the display. For more details see: https://github.com/jhovold/linux/wiki/X13s Not-signed-off-by:
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On most modern qualcomm SoCs, the configuration necessary to enable the Tag/Data RAM realted irqs being propagated to the SoC irq controller is already done in firmware (in DSF or 'DDR System Firmware') On some like the x1e80100, these registers aren't even accesible to the kernel causing a crash when edac device is probed. Hence, make the irq configuration optional in the driver and mark x1e80100 as the SoC on which this should be avoided. Fixes: af16b005 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Reported-by:
Bjorn Andersson <andersson@kernel.org> Signed-off-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Link: https://lore.kernel.org/r/20240903060138.3191160-1-quic_rjendra@quicinc.com Signed-off-by:
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During suspend/resume process all connectors are explicitly disabled and then reenabled. However resume fails because of the connector_status check: [ 1185.831970] [dpu error]connector not connected 3 It doesn't make sense to check for the Writeback connected status (and other drivers don't perform such check), so drop the check. Fixes: 71174f36 ("drm/msm/dpu: move writeback's atomic_check to dpu_writeback.c") Cc: stable@vger.kernel.org Reported-by:
Leonard Lausen <leonard@lausen.nl> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/57 Signed-off-by:
György Kurucz <me@kuruczgy.com> Link: https://lore.kernel.org/r/20240802-dpu-fix-wb-v2-1-7eac9eb8e895@linaro.org Signed-off-by:
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