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Commit 25894713 authored by Abel Vesa's avatar Abel Vesa
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arm64: dts: qcom: x1e80100-crd: Enable external DP support


The Qualcomm Snapdragon X Elite CRD board has 3 USB Type-C ports,
all of them supporting external DP altmode. Between each QMP
combo PHY and the corresponding Type-C port, sits one Parade PS8830
retimer which handles both orientation and SBU muxing. Add nodes for
each retimer, fix the graphs between connectors and the PHYs accordingly,
add the voltage regulators needed by each retimer and then enable all
3 remaining DPUs.

Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
parent 28f245bc
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......@@ -99,7 +99,15 @@ port@1 {
reg = <1>;
pmic_glink_ss0_ss_in: endpoint {
remote-endpoint = <&usb_1_ss0_qmpphy_out>;
remote-endpoint = <&retimer_ss0_ss_out>;
};
};
port@2 {
reg = <2>;
pmic_glink_ss0_con_sbu_in: endpoint {
remote-endpoint = <&retimer_ss0_con_sbu_out>;
};
};
};
......@@ -128,7 +136,15 @@ port@1 {
reg = <1>;
pmic_glink_ss1_ss_in: endpoint {
remote-endpoint = <&usb_1_ss1_qmpphy_out>;
remote-endpoint = <&retimer_ss1_ss_out>;
};
};
port@2 {
reg = <2>;
pmic_glink_ss1_con_sbu_in: endpoint {
remote-endpoint = <&retimer_ss1_con_sbu_out>;
};
};
};
......@@ -157,7 +173,15 @@ port@1 {
reg = <1>;
pmic_glink_ss2_ss_in: endpoint {
remote-endpoint = <&usb_1_ss2_qmpphy_out>;
remote-endpoint = <&retimer_ss2_ss_out>;
};
};
port@2 {
reg = <2>;
pmic_glink_ss2_con_sbu_in: endpoint {
remote-endpoint = <&retimer_ss2_con_sbu_out>;
};
};
};
......@@ -298,8 +322,143 @@ vreg_nvme: regulator-nvme {
gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&nvme_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR0_1P15";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr0_1p15_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR0_1P8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr0_1p8_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR0_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr0_3p3_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR1_1P15";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr1_1p15_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR1_1P8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr1_1p8_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR1_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr1_3p3_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR2_1P15";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr2_1p15_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR2_1P8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr2_1p8_reg_en>;
pinctrl-names = "default";
};
vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
compatible = "regulator-fixed";
regulator-name = "VREG_RTMR2_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&rtmr2_3p3_reg_en>;
pinctrl-names = "default";
};
vreg_wwan: regulator-wwan {
......@@ -709,6 +868,172 @@ keyboard@3a {
};
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
typec-mux@8 {
compatible = "parade,ps8830";
reg = <0x08>;
clocks = <&rpmhcc RPMH_RF_CLK5>;
clock-names = "xo";
vdd-supply = <&vreg_rtmr2_1p15>;
vdd33-supply = <&vreg_rtmr2_3p3>;
vdd33-cap-supply = <&vreg_rtmr2_3p3>;
vddar-supply = <&vreg_rtmr2_1p15>;
vddat-supply = <&vreg_rtmr2_1p15>;
vddio-supply = <&vreg_rtmr2_1p8>;
reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>;
orientation-switch;
retimer-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
retimer_ss2_ss_out: endpoint {
remote-endpoint = <&pmic_glink_ss2_ss_in>;
};
};
port@1 {
reg = <1>;
retimer_ss2_ss_in: endpoint {
remote-endpoint = <&usb_1_ss2_qmpphy_out>;
};
};
port@2 {
reg = <2>;
retimer_ss2_con_sbu_out: endpoint {
remote-endpoint = <&pmic_glink_ss2_con_sbu_in>;
};
};
};
};
};
&i2c3 {
clock-frequency = <400000>;
status = "okay";
typec-mux@8 {
compatible = "parade,ps8830";
reg = <0x08>;
clocks = <&rpmhcc RPMH_RF_CLK3>;
clock-names = "xo";
vdd-supply = <&vreg_rtmr0_1p15>;
vdd33-supply = <&vreg_rtmr0_3p3>;
vdd33-cap-supply = <&vreg_rtmr0_3p3>;
vddar-supply = <&vreg_rtmr0_1p15>;
vddat-supply = <&vreg_rtmr0_1p15>;
vddio-supply = <&vreg_rtmr0_1p8>;
reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>;
retimer-switch;
orientation-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
retimer_ss0_ss_out: endpoint {
remote-endpoint = <&pmic_glink_ss0_ss_in>;
};
};
port@1 {
reg = <1>;
retimer_ss0_ss_in: endpoint {
remote-endpoint = <&usb_1_ss0_qmpphy_out>;
};
};
port@2 {
reg = <2>;
retimer_ss0_con_sbu_out: endpoint {
remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
};
};
};
};
};
&i2c7 {
clock-frequency = <400000>;
status = "okay";
typec-mux@8 {
compatible = "parade,ps8830";
reg = <0x8>;
clocks = <&rpmhcc RPMH_RF_CLK4>;
clock-names = "xo";
vdd-supply = <&vreg_rtmr1_1p15>;
vdd33-supply = <&vreg_rtmr1_3p3>;
vdd33-cap-supply = <&vreg_rtmr1_3p3>;
vddar-supply = <&vreg_rtmr1_1p15>;
vddat-supply = <&vreg_rtmr1_1p15>;
vddio-supply = <&vreg_rtmr1_1p8>;
reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>;
retimer-switch;
orientation-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
retimer_ss1_ss_out: endpoint {
remote-endpoint = <&pmic_glink_ss1_ss_in>;
};
};
port@1 {
reg = <1>;
retimer_ss1_ss_in: endpoint {
remote-endpoint = <&usb_1_ss1_qmpphy_out>;
};
};
port@2 {
reg = <2>;
retimer_ss1_con_sbu_out: endpoint {
remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
};
};
};
};
};
&i2c8 {
clock-frequency = <400000>;
......@@ -756,6 +1081,30 @@ &mdss {
status = "okay";
};
&mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1 2 3>;
};
&mdss_dp1 {
status = "okay";
};
&mdss_dp1_out {
data-lanes = <0 1 2 3>;
};
&mdss_dp2 {
status = "okay";
};
&mdss_dp2_out {
data-lanes = <0 1 2 3>;
};
&mdss_dp3 {
compatible = "qcom,x1e80100-dp";
/delete-property/ #sound-dai-cells;
......@@ -854,6 +1203,33 @@ &pcie6a_phy {
status = "okay";
};
&pm8550_gpios {
rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {
pins = "gpio11";
function = "func1";
input-disable;
output-enable;
};
};
&pm8550ve_8_gpios {
rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state {
pins = "gpio8";
function = "func1";
input-disable;
output-enable;
};
};
&pm8550ve_9_gpios {
rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {
pins = "gpio8";
function = "func1";
input-disable;
output-enable;
};
};
&pmc8380_3_gpios {
edp_bl_en: edp-bl-en-state {
pins = "gpio4";
......@@ -1093,6 +1469,48 @@ wake-n-pins {
};
};
rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {
pins = "gpio188";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {
pins = "gpio175";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {
pins = "gpio186";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state {
pins = "gpio189";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state {
pins = "gpio126";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state {
pins = "gpio187";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tpad_default: tpad-default-state {
pins = "gpio3";
function = "gpio";
......@@ -1164,7 +1582,7 @@ &usb_1_ss0_dwc3_hs {
};
&usb_1_ss0_qmpphy_out {
remote-endpoint = <&pmic_glink_ss0_ss_in>;
remote-endpoint = <&retimer_ss0_ss_in>;
};
&usb_1_ss1_hsphy {
......@@ -1196,7 +1614,7 @@ &usb_1_ss1_dwc3_hs {
};
&usb_1_ss1_qmpphy_out {
remote-endpoint = <&pmic_glink_ss1_ss_in>;
remote-endpoint = <&retimer_ss1_ss_in>;
};
&usb_1_ss2_hsphy {
......@@ -1228,5 +1646,5 @@ &usb_1_ss2_dwc3_hs {
};
&usb_1_ss2_qmpphy_out {
remote-endpoint = <&pmic_glink_ss2_ss_in>;
remote-endpoint = <&retimer_ss2_ss_in>;
};
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