From b55a6abd9942e22b65f6c8368ed8c4c11c022be9 Mon Sep 17 00:00:00 2001
From: Tony Truong <truong@codeaurora.org>
Date: Thu, 12 Dec 2019 19:14:58 -0800
Subject: [PATCH] msm: msi: allow accesses to device MSI registers when using
QGIC
Accessing device MSI registers is also needed when using QGIC
mask/unmask. Allow PCIe bus driver to configure device MSI
registers.
Change-Id: I2c9247f69149f37ae015e1271eac3854bda24549
Signed-off-by: Tony Truong <truong@codeaurora.org>
---
drivers/pci/host/pci-msm-msi.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/pci/host/pci-msm-msi.c b/drivers/pci/host/pci-msm-msi.c
index 0c6bb03471e8e..83f0b112e26fb 100644
--- a/drivers/pci/host/pci-msm-msi.c
+++ b/drivers/pci/host/pci-msm-msi.c
@@ -76,7 +76,7 @@ struct msm_msi {
phys_addr_t msi_addr;
enum msi_type type;
spinlock_t cfg_lock; /* lock for configuring Synopsys MSI registers */
- bool cfg_access; /* control access to Synopsys MSI registers */
+ bool cfg_access; /* control access to MSI registers */
void __iomem *pcie_cfg;
void (*mask_irq)(struct irq_data *data);
@@ -483,35 +483,32 @@ static int msm_msi_alloc_domains(struct msm_msi *msi)
return 0;
}
-/* control access to Synopsys PCIe MSI registers */
+/* control access to PCIe MSI registers */
void msm_msi_config_access(struct irq_domain *domain, bool allow)
{
struct msm_msi *msi = domain->parent->host_data;
unsigned long flags;
- if (msi->type == MSM_MSI_TYPE_QCOM)
- return;
-
spin_lock_irqsave(&msi->cfg_lock, flags);
msi->cfg_access = allow;
spin_unlock_irqrestore(&msi->cfg_lock, flags);
}
EXPORT_SYMBOL(msm_msi_config_access);
-/* configure Synopsys PCIe MSI registers */
void msm_msi_config(struct irq_domain *domain)
{
struct msm_msi *msi;
int i;
msi = domain->parent->host_data;
- if (msi->type == MSM_MSI_TYPE_QCOM)
- return;
/* PCIe core driver sets to false during LPM */
msm_msi_config_access(domain, true);
- /* program MSI termination address */
+ if (msi->type == MSM_MSI_TYPE_QCOM)
+ return;
+
+ /* program Synopsys MSI termination address */
writel_relaxed(msi->msi_addr, msi->pcie_cfg + PCIE_MSI_CTRL_ADDR_OFFS);
writel_relaxed(0, msi->pcie_cfg + PCIE_MSI_CTRL_UPPER_ADDR_OFFS);
--
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