phy: for 5.2
*) Add a new *release* phy_ops invoked when the consumer relinquishes PHY
that can be used to undo the operation performed in xlate
*) Add new driver to support USB2 PHY and shared USB3 + PCIE PHY in Amlogic
G12A SoC Family.
*) Add new driver to support for Broadcom's Stingray USB PHY (Type 1 has
one super speed PHY and one high speed PHY, Type 2 has one high speed PHY)
*) Add new driver to support USB PHY in hi3660 SoC of Hisilicon
*) Add new driver to support UFS M-PHY in MediaTek SoC
*) Add new driver to support XUSB pad controller in Tegra186 SoCs
*) Add new driver to support SERDES in TI's AM654 platform
*) Add support for generation 2 USB2 PHY and gneration 3 USB2 PHY in r8a77470
to phy-rcar-gen2.c and phy-rcar-gen3-usb2.c respectively
*) Add support for PCIe QMP PHY support in msm8998 to phy-qcom-qmp.c
*) Add support for SERDES6G in phy-ocelot-serdes.c
*) Add support to set drive impedance from device tree in phy-rockchip-emmc.c
*) Add support to power up/down the VBUS voltage rail in phy-fsl-imx8mq-usb.c
*) Add support to shut off regulators that power UFS during system suspend
*) Re-design phy-rcar-gen3-usb2.c to create separate PHY instances for each
channel which helps to enable/disable interrupts for each instance
independently
*) Fix PCIe power up sequence to follow the TRM in order to ensure the DPLL &
PHY operates correctly over the entire temperature range.
*) Use devm_clk_get_optional to get optional clocks instead of adding
custom error checks
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>